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Searched refs:createReg (Results 1 – 25 of 73) sorted by relevance

123

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp1410 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR64RegisterClass()
1421 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRMM16RegisterClass()
1432 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRMM16ZeroRegisterClass()
1443 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRMM16MovePRegisterClass()
1454 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass()
1483 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFGR64RegisterClass()
1495 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFGR32RegisterClass()
1506 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeCCRRegisterClass()
1517 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFCCRegisterClass()
1528 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFGRCCRegisterClass()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp87 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
251 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
263 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
279 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
284 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
301 Inst.addOperand(MCOperand::createReg(RRegs[Base])); in decodeMemRIHashOperands()
316 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIX16Operands()
345 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRI34Operands()
360 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE8Operands()
375 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE4Operands()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp74 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
85 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR16RegisterClass()
96 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32RegisterClass()
107 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32CRegisterClass()
118 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64RegisterClass()
129 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64CRegisterClass()
160 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRCRegisterClass()
171 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVRRegisterClass()
191 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVRM2RegisterClass()
211 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVRM4RegisterClass()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp41 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
44 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop()
45 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop()
47 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
48 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
H A DARMAsmPrinter.cpp1467 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
1469 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
1499 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
1501 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
1804 TmpInst.addOperand(MCOperand::createReg(ARM::PC)); in emitInstruction()
1808 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
1811 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
1824 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
1838 TmpInst.addOperand(MCOperand::createReg(0)); in emitInstruction()
2200 TmpInstDSB.addOperand(MCOperand::createReg(0)); in emitInstruction()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp88 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
296 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr12Operand()
306 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr20Operand()
317 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr12Operand()
329 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr20Operand()
341 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDLAddr12Len4Operand()
353 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDLAddr12Len8Operand()
365 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDRAddr12Operand()
367 Inst.addOperand(MCOperand::createReg(Regs[Length])); in decodeBDRAddr12Operand()
377 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDVAddr12Operand()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp173 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitR()
182 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRX()
213 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRX()
214 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRX()
231 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRRX()
232 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRRX()
233 TmpInst.addOperand(MCOperand::createReg(Reg2)); in emitRRRX()
251 TmpInst.addOperand(MCOperand::createReg(Reg0)); in emitRRIII()
252 TmpInst.addOperand(MCOperand::createReg(Reg1)); in emitRRIII()
1293 Inst.addOperand(MCOperand::createReg(GPReg)); in emitDirectiveCpreturn()
[all …]
H A DMipsNaClELFStreamer.cpp105 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
106 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
107 MaskInst.addOperand(MCOperand::createReg(MaskReg)); in emitMask()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1781 mcInst.addOperand(MCOperand::createReg(llvmRegnum)); in translateRegister()
1849 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateSrcIndex()
1874 MCOperand baseReg = MCOperand::createReg(baseRegNo); in translateDstIndex()
2127 baseReg = MCOperand::createReg(X86::BX); in translateRMMemory()
2128 indexReg = MCOperand::createReg(X86::SI); in translateRMMemory()
2131 baseReg = MCOperand::createReg(X86::BX); in translateRMMemory()
2132 indexReg = MCOperand::createReg(X86::DI); in translateRMMemory()
2135 baseReg = MCOperand::createReg(X86::BP); in translateRMMemory()
2136 indexReg = MCOperand::createReg(X86::SI); in translateRMMemory()
2139 baseReg = MCOperand::createReg(X86::BP); in translateRMMemory()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp2576 Inst.addOperand(MCOperand::createReg(*I)); in addRegListOperands()
2584 Inst.addOperand(MCOperand::createReg(*I)); in addRegListWithAPSROperands()
2982 Inst.addOperand(MCOperand::createReg(0)); in addAM2OffsetImmOperands()
2993 Inst.addOperand(MCOperand::createReg(0)); in addAddrMode3Operands()
3042 Inst.addOperand(MCOperand::createReg(0)); in addAM3OffsetOperands()
8685 TmpInst.addOperand(MCOperand::createReg(0)); in processInstruction()
8723 TmpInst.addOperand(MCOperand::createReg(0)); in processInstruction()
10024 TmpInst.addOperand(MCOperand::createReg( in processInstruction()
10031 TmpInst.addOperand(MCOperand::createReg( in processInstruction()
10077 TmpInst.addOperand(MCOperand::createReg( in processInstruction()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h520 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
528 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR32orGR64Operands()
537 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR16orGR32orGR64Operands()
571 Inst.addOperand(MCOperand::createReg(Reg)); in addMaskPairOperands()
577 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addMemOperands()
581 Inst.addOperand(MCOperand::createReg(getMemIndexReg())); in addMemOperands()
583 Inst.addOperand(MCOperand::createReg(getMemSegReg())); in addMemOperands()
597 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addSrcIdxOperands()
598 Inst.addOperand(MCOperand::createReg(getMemSegReg())); in addSrcIdxOperands()
603 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addDstIdxOperands()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp186 MCOperand MCRegOP = MCOperand::createReg(MO.getReg()); in lowerGETGOTAndEmitMCInsts()
203 MCOperand RegGOT = MCOperand::createReg(VE::SX15); // GOT in lowerGETGOTAndEmitMCInsts()
204 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT in lowerGETGOTAndEmitMCInsts()
225 MCOperand MCRegOP = MCOperand::createReg(MO.getReg()); in lowerGETFunPLTAndEmitMCInsts()
252 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT in lowerGETFunPLTAndEmitMCInsts()
293 MCOperand RegLR = MCOperand::createReg(VE::SX10); // LR in lowerGETTLSAddrAndEmitMCInsts()
294 MCOperand RegS0 = MCOperand::createReg(VE::SX0); // S0 in lowerGETTLSAddrAndEmitMCInsts()
295 MCOperand RegS12 = MCOperand::createReg(VE::SX12); // S12 in lowerGETTLSAddrAndEmitMCInsts()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp1081 MI.addOperand(MCOperand::createReg(DefRegister)); in LowerFAULTING_OP()
1108 MOVI.addOperand(MCOperand::createReg(DestReg)); in emitFMov0()
1117 FMov.addOperand(MCOperand::createReg(DestReg)); in emitFMov0()
1122 FMov.addOperand(MCOperand::createReg(DestReg)); in emitFMov0()
1127 FMov.addOperand(MCOperand::createReg(DestReg)); in emitFMov0()
1192 MovZ.addOperand(MCOperand::createReg(DestReg)); in emitInstruction()
1199 MovK.addOperand(MCOperand::createReg(DestReg)); in emitInstruction()
1200 MovK.addOperand(MCOperand::createReg(DestReg)); in emitInstruction()
1303 Adrp.addOperand(MCOperand::createReg(AArch64::X0)); in emitInstruction()
1315 Ldr.addOperand(MCOperand::createReg(AArch64::X0)); in emitInstruction()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp170 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
179 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRiMemoryValue()
191 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
193 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
203 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeSplsValue()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMCInstLower.cpp100 MCOp = MCOperand::createReg(MO.getReg()); in LowerRISCVMachineOperandToMCOperand()
189 MCOp = MCOperand::createReg(Reg); in lowerRISCVVMachineInstrToMCInst()
202 OutMI.addOperand(MCOperand::createReg(RISCV::NoRegister)); in lowerRISCVVMachineInstrToMCInst()
238 OutMI.addOperand(MCOperand::createReg(RISCV::X0)); in lowerRISCVMachineInstrToMCInst()
244 OutMI.addOperand(MCOperand::createReg(RISCV::X0)); in lowerRISCVMachineInstrToMCInst()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp107 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
122 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass()
132 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeMemoryOpValue()
213 Instr.addOperand(MCOperand::createReg(BPF::R6)); in getInstruction()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp152 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeIntRegsRegisterClass()
163 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeI64RegsRegisterClass()
175 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPRegsRegisterClass()
187 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeDFPRegsRegisterClass()
202 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeQFPRegsRegisterClass()
213 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeCPRegsRegisterClass()
222 Inst.addOperand(MCOperand::createReg(FCCRegDecoderTable[RegNo])); in DecodeFCCRegsRegisterClass()
231 Inst.addOperand(MCOperand::createReg(ASRRegDecoderTable[RegNo])); in DecodeASRRegsRegisterClass()
240 Inst.addOperand(MCOperand::createReg(PRRegDecoderTable[RegNo])); in DecodePRRegsRegisterClass()
255 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeIntPairRegisterClass()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp386 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR128RegisterClass()
415 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR64RegisterClass()
436 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR32RegisterClass()
457 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR16RegisterClass()
478 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR8RegisterClass()
499 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64commonRegisterClass()
510 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64RegisterClass()
539 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64x8ClassRegisterClass()
551 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64spRegisterClass()
567 Inst.addOperand(MCOperand::createReg(Register)); in DecodeMatrixIndexGPR32_12_15RegisterClass()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp455 Inst.addOperand(MCOperand::createReg(RRegs[getReg()])); in addRegGPRCOperands()
465 Inst.addOperand(MCOperand::createReg(XRegs[getReg()])); in addRegG8RCOperands()
475 Inst.addOperand(MCOperand::createReg(XRegs[getG8pReg()])); in addRegG8pRCOperands()
494 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF4RCOperands()
499 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF8RCOperands()
504 Inst.addOperand(MCOperand::createReg(VFRegs[getReg()])); in addRegVFRCOperands()
509 Inst.addOperand(MCOperand::createReg(VRegs[getReg()])); in addRegVRRCOperands()
514 Inst.addOperand(MCOperand::createReg(VSRegs[getVSReg()])); in addRegVSRCOperands()
529 Inst.addOperand(MCOperand::createReg(RRegs[getReg()])); in addRegSPE4RCOperands()
534 Inst.addOperand(MCOperand::createReg(SPERegs[getReg()])); in addRegSPERCOperands()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp838 MI.insert(CCI, MCOperand::createReg(0)); in AddThumbPredicate()
1455 Inst.addOperand(MCOperand::createReg(0)); in DecodePredicateOperand()
1466 Inst.addOperand(MCOperand::createReg(0)); in DecodeCCOutOperand()
1938 Inst.addOperand(MCOperand::createReg(0)); in DecodeAddrMode2IdxInstruction()
2170 Inst.addOperand(MCOperand::createReg(0)); in DecodeAddrMode3Instruction()
3424 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD3DupInstruction()
3476 Inst.addOperand(MCOperand::createReg(0)); in DecodeVLD4DupInstruction()
3554 Inst.addOperand(MCOperand::createReg(0)); in DecodeMVEModImmInstruction()
6120 Inst.addOperand(MCOperand::createReg(0)); in DecodeVSCCLRM()
6378 Inst.addOperand(MCOperand::createReg(0)); in DecodeVSTRVLDR_SYSREG()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/AsmParser/
H A DM68kAsmParser.cpp263 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
317 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIOperands()
327 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIDOperands()
338 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIIOperands()
339 Inst.addOperand(MCOperand::createReg(MemOp.InnerReg)); in addARIIOperands()
348 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIPDOperands()
357 Inst.addOperand(MCOperand::createReg(MemOp.OuterReg)); in addARIPIOperands()
377 Inst.addOperand(MCOperand::createReg(MemOp.InnerReg)); in addPCIOperands()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp169 createReg(RegisterKind Kind, unsigned Num, SMLoc StartLoc, SMLoc EndLoc) { in createReg() function in __anonc1ff31d20111::SystemZOperand
297 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
306 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDAddrOperands()
312 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDXAddrOperands()
314 Inst.addOperand(MCOperand::createReg(Mem.Index)); in addBDXAddrOperands()
319 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDLAddrOperands()
326 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDRAddrOperands()
328 Inst.addOperand(MCOperand::createReg(Mem.Length.Reg)); in addBDRAddrOperands()
333 Inst.addOperand(MCOperand::createReg(Mem.Base)); in addBDVAddrOperands()
335 Inst.addOperand(MCOperand::createReg(Mem.Index)); in addBDVAddrOperands()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/
H A DVEDisassembler.cpp133 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeI32RegisterClass()
143 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeI64RegisterClass()
153 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeF32RegisterClass()
163 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeF128RegisterClass()
177 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeV64RegisterClass()
187 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVMRegisterClass()
197 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVM512RegisterClass()
209 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeMISCRegisterClass()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp190 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
206 static std::unique_ptr<BPFOperand> createReg(unsigned RegNo, SMLoc S, in createReg() function
430 Operands.push_back(BPFOperand::createReg(RegNo, S, E)); in parseRegister()
469 Operands.push_back(BPFOperand::createReg(RegNo, NameLoc, E)); in ParseInstruction()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp285 Inst.addOperand(MCOperand::createReg(Hexagon::R0)); in HexagonProcessInstruction()
466 TmpInst.addOperand(MCOperand::createReg(High)); in HexagonProcessInstruction()
467 TmpInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
544 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
556 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()
570 MappedInst.addOperand(MCOperand::createReg(Low)); in HexagonProcessInstruction()

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