Home
last modified time | relevance | path

Searched refs:buildMerge (Results 1 – 14 of 14) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp413 MIRBuilder.buildMerge(Val, {Load_P2Half, Load_Rem}); in legalizeCustom()
415 auto Merge = MIRBuilder.buildMerge(s64, {Load_P2Half, Load_Rem}); in legalizeCustom()
442 auto Bitcast = MIRBuilder.buildMerge(s64, {Src, C_HiMask.getReg(0)}); in legalizeCustom()
H A DMipsCallLowering.cpp181 MIRBuilder.buildMerge(Arg.OrigRegs[0], {CopyLo, CopyHi}); in assignCustomValue()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp1871 B.buildMerge(Dst, {Src, HighAddr}); in legalizeAddrSpaceCast()
2148 Sign = B.buildMerge(S64, {Sign, Sign}); in legalizeFPTOI()
2152 B.buildMerge(Dst, {Lo, Hi}); in legalizeFPTOI()
2741 auto Merge = B.buildMerge(S32, {Src0, Src1}); in legalizeBuildVector()
2971 auto Rcp = B.buildMerge(S64, {RcpLo, RcpHi}); in legalizeUnsignedDIV_REM64Impl()
2986 auto Add1 = B.buildMerge(S64, {Add1_Lo, Add1_Hi}); in legalizeUnsignedDIV_REM64Impl()
2999 auto Add2 = B.buildMerge(S64, {Add2_Lo, Add2_Hi}); in legalizeUnsignedDIV_REM64Impl()
3013 auto Sub1 = B.buildMerge(S64, {Sub1_Lo, Sub1_Hi}); in legalizeUnsignedDIV_REM64Impl()
3036 auto Sub2 = B.buildMerge(S64, {Sub2_Lo, Sub2_Hi}); in legalizeUnsignedDIV_REM64Impl()
3054 auto Sub3 = B.buildMerge(S64, {Sub3_Lo, Sub3_Hi}); in legalizeUnsignedDIV_REM64Impl()
[all …]
H A DAMDGPURegisterBankInfo.cpp934 B.buildMerge(LLT::scalar(64), in executeInWaterfallLoop()
989 auto Merge = B.buildMerge(OpTy, ReadlanePieces); in executeInWaterfallLoop()
1525 B.buildMerge(Dst, LoadParts); in applyMappingSBufferLoad()
1585 B.buildMerge(DstReg, {Extract, Extend}); in applyMappingBFE()
1594 B.buildMerge(DstReg, {UnmergeSOffset.getReg(0), Extract}); in applyMappingBFE()
1717 return B.buildMerge(LLT::fixed_vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp358 B.buildMerge(OrigRegs[0], Regs); in buildCopyFromRegs()
360 auto Widened = B.buildMerge(LLT::scalar(SrcSize), Regs); in buildCopyFromRegs()
428 auto Merge = B.buildMerge(RealDstEltTy, Regs.take_front(PartsPerElt)); in buildCopyFromRegs()
504 UnmergeSrc = B.buildMerge(LCMTy, MergeParts).getReg(0); in buildCopyToRegs()
H A DLegalizerHelper.cpp214 MIRBuilder.buildMerge(DstReg, PartRegs); in insertParts()
366 MIRBuilder.buildMerge(DstReg, RemergeRegs); in buildWidenedRemergeToDst()
862 MIRBuilder.buildMerge(DstReg, DstRegs); in narrowScalar()
1268 MIRBuilder.buildMerge(DstReg, DstRegs); in narrowScalar()
2633 MIRBuilder.buildMerge(Dst, SrcRegs); in lowerBitcast()
2641 MIRBuilder.buildMerge(Dst, SrcRegs); in lowerBitcast()
4895 MIRBuilder.buildMerge(DstReg, ResultRegs); in narrowScalarShift()
5247 MIRBuilder.buildMerge(DstReg, DstRegs); in narrowScalarMul()
5337 MIRBuilder.buildMerge(DstReg, DstRegs); in narrowScalarExtract()
5419 MIRBuilder.buildMerge(MergeReg, DstRegs); in narrowScalarInsert()
[all …]
H A DMachineIRBuilder.cpp566 buildMerge(Res, Ops); in buildSequence()
586 MachineInstrBuilder MachineIRBuilder::buildMerge(const DstOp &Res, in buildMerge() function in MachineIRBuilder
597 MachineIRBuilder::buildMerge(const DstOp &Res, in buildMerge() function in MachineIRBuilder
H A DCombinerHelper.cpp338 Builder.buildMerge(NewDstReg, Ops); in applyCombineShuffleVector()
2281 Builder.buildMerge(DstReg, { Narrowed, Zero }); in applyCombineShiftToUnmerge()
2294 Builder.buildMerge(DstReg, { Zero, Narrowed }); in applyCombineShiftToUnmerge()
2304 Builder.buildMerge(DstReg, { Unmerge.getReg(1), Hi }); in applyCombineShiftToUnmerge()
2310 Builder.buildMerge(DstReg, { Hi, Hi }); in applyCombineShiftToUnmerge()
2318 Builder.buildMerge(DstReg, { Lo, Hi }); in applyCombineShiftToUnmerge()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp382 MIRBuilder.buildMerge(Info.OrigRet.Regs[0], NewRegs); in lowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h290 Builder.buildMerge(DstReg, SrcRegs); in tryCombineTrunc()
932 Builder.buildMerge(DefReg, Regs); in tryCombineUnmergeValues()
H A DMachineIRBuilder.h923 MachineInstrBuilder buildMerge(const DstOp &Res, ArrayRef<Register> Ops);
924 MachineInstrBuilder buildMerge(const DstOp &Res,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp331 MIRBuilder.buildMerge(Arg.Regs[0], NewRegs); in assignCustomValue()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp402 MIRBuilder.buildMerge({NewLLT}, {CurVReg, Undef}).getReg(0); in lowerReturn()
H A DAArch64LegalizerInfo.cpp1258 MIRBuilder.buildMerge(MI.getOperand(0), {DstLo, DstHi}); in legalizeAtomicCmpxchg128()