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/freebsd-13.1/sys/contrib/device-tree/Bindings/sound/
H A Dnvidia,tegra210-ahub.yaml42 assigned-clocks:
45 assigned-clock-parents:
48 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
79 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
80 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
116 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
118 assigned-clock-rates = <1536000>;
127 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
[all …]
H A Dbrcm,cygnus-audio.txt13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
H A Dnvidia,tegra210-dmic.yaml41 assigned-clocks:
44 assigned-clock-parents:
47 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
76 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
77 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
78 assigned-clock-rates = <3072000>;
H A Dnvidia,tegra186-dspk.yaml40 assigned-clocks:
43 assigned-clock-parents:
46 assigned-clock-rates:
63 - assigned-clocks
64 - assigned-clock-parents
76 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
77 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
78 assigned-clock-rates = <12288000>;
H A Dmt2701-afe-pcm.txt47 - assigned-clocks: list of input clocks and dividers for the audio system.
49 - assigned-clocks-parents: parent of input clocks of assigned clocks.
50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
H A Dnvidia,tegra210-i2s.yaml56 assigned-clocks:
60 assigned-clock-parents:
64 assigned-clock-rates:
82 - assigned-clocks
83 - assigned-clock-parents
94 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
95 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
96 assigned-clock-rates = <1536000>;
/freebsd-13.1/sys/contrib/device-tree/Bindings/phy/
H A Dti,phy-j721e-wiz.yaml47 assigned-clocks:
50 assigned-clock-parents:
84 assigned-clocks:
87 assigned-clock-parents:
93 - assigned-clocks
94 - assigned-clock-parents
129 assigned-clocks:
132 assigned-clock-parents:
138 - assigned-clocks
139 - assigned-clock-parents
[all …]
/freebsd-13.1/sys/contrib/device-tree/src/arm/
H A Dimx7ulp.dtsi154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
285 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM5>;
335 assigned-clock-rates = <48000000>;
347 assigned-clock-rates = <48000000>;
359 assigned-clock-rates = <48000000>;
[all …]
H A Dexynos5422-odroidxu3-audio.dtsi32 assigned-clocks = <&clock CLK_MOUT_EPLL>,
41 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
47 assigned-clock-rates = <0>,
66 assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
68 assigned-clock-rates = <(196608000 / 256)>,
87 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
88 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
H A Dexynos5422-odroidxu4.dts38 assigned-clocks = <&clock CLK_MOUT_EPLL>,
47 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
53 assigned-clock-rates = <0>,
73 assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
75 assigned-clock-rates = <(196608000 / 256)>,
81 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
82 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
H A Dexynos4412-odroid-common.dtsi144 assigned-clocks = <&clock CLK_FOUT_EPLL>;
145 assigned-clock-rates = <45158401>;
158 assigned-clock-rates = <0>, <0>,
211 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
214 assigned-clock-rates = <0>, <176000000>;
219 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
222 assigned-clock-rates = <0>, <176000000>;
227 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
230 assigned-clock-rates = <0>, <176000000>;
235 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
[all …]
H A Dimx7d-pico.dtsi105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
107 assigned-clock-parents = <&clks IMX7D_CKIL>;
108 assigned-clock-rates = <0>, <32768>;
124 assigned-clock-rates = <0>, <100000000>;
278 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
281 assigned-clock-rates = <0>, <24576000>;
313 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
321 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
330 assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
379 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
[all …]
H A Dimx7d-cl-som-imx7.dts47 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
49 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
50 assigned-clock-rates = <0>, <100000000>;
75 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
77 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
78 assigned-clock-rates = <0>, <100000000>;
197 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
198 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
212 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
213 assigned-clock-rates = <400000000>;
H A Dimx7d-zii-rpu2.dts190 assigned-clock-rates = <884736000>;
214 assigned-clock-rates = <0>, <100000000>;
297 assigned-clock-rates = <0>, <100000000>;
457 assigned-clocks = <&cs2000>;
458 assigned-clock-rates = <24000000>;
568 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
571 assigned-clock-rates = <0>, <36864000>;
578 assigned-clocks = <&clks IMX7D_SAI2_ROOT_SRC>,
581 assigned-clock-rates = <0>, <36864000>;
588 assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>,
[all …]
H A Dimx7s-warp.dts84 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
85 assigned-clock-rates = <884736000>;
268 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
270 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
271 assigned-clock-rates = <0>, <36864000>;
278 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
279 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
286 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
295 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
322 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
[all …]
H A Dimx7d-nitrogen7.dts114 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
116 assigned-clock-parents = <&clks IMX7D_CKIL>;
117 assigned-clock-rates = <0>, <32768>;
131 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
134 assigned-clock-rates = <0>, <100000000>;
322 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
330 assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
338 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
346 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
404 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
[all …]
H A Dexynos4412-itop-elite.dts130 assigned-clocks = <&clock CLK_MOUT_CAM0>;
131 assigned-clock-parents = <&clock CLK_XUSBXTI>;
135 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
139 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
141 assigned-clock-rates = <0>, <0>, <112896000>, <11289600>;
159 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
161 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
162 assigned-clock-rates = <0>, <176000000>;
/freebsd-13.1/crypto/heimdal/lib/roken/
H A Denvironment.c63 read_env_file(FILE *F, char ***env, int *assigned) in read_env_file() argument
72 *assigned = 0; in read_env_file()
100 (*assigned)++; in read_env_file()
117 (*assigned)++; in read_env_file()
133 int assigned; in read_environment() local
139 read_env_file(F, env, &assigned); in read_environment()
141 return assigned; in read_environment()
/freebsd-13.1/sys/contrib/device-tree/Bindings/ufs/
H A Dti,j721e-ufs.yaml28 assigned-clocks:
31 assigned-clock-parents:
72 assigned-clocks = <&k3_clks 277 1>;
73 assigned-clock-parents = <&k3_clks 277 4>;
86 assigned-clocks = <&k3_clks 277 1>;
87 assigned-clock-parents = <&k3_clks 277 4>;
/freebsd-13.1/sys/contrib/device-tree/src/mips/img/
H A Dpistachio.dtsi53 assigned-clock-rates = <100000000>, <33333334>;
71 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
162 assigned-clock-rates = <12288000>;
178 assigned-clocks = <&clk_core CLK_SPDIF_DIV>;
179 assigned-clock-rates = <12288000>;
752 assigned-clock-rates = <4000000>, <32768>;
763 assigned-clock-rates = <4000000>, <32768>;
789 assigned-clock-rates = <0>, <50000000>;
[all …]
/freebsd-13.1/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721e-main.dtsi344 assigned-clocks = <&wiz0_pll0_refclk>;
358 assigned-clocks = <&wiz0_refclk_dig>;
415 assigned-clocks = <&wiz1_refclk_dig>;
472 assigned-clocks = <&wiz2_refclk_dig>;
529 assigned-clocks = <&wiz3_refclk_dig>;
825 assigned-clocks = <&k3_clks 91 1>;
843 assigned-clocks = <&k3_clks 92 0>;
859 assigned-clocks = <&k3_clks 93 0>;
1010 assigned-clocks = <&k3_clks 277 1>;
1317 assigned-clocks = <&k3_clks 252 1>;
[all …]
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/msm/
H A Ddpu.txt38 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
39 - assigned-clock-rates: list of clock frequencies sorted in the same order as
40 the assigned-clocks property.
70 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
71 - assigned-clock-rates: list of clock frequencies sorted in the same order as
72 the assigned-clocks property.
87 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>;
88 assigned-clock-rates = <300000000>;
116 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>,
118 assigned-clock-rates = <0 0 300000000 19200000>;
/freebsd-13.1/sys/contrib/device-tree/Bindings/rtc/
H A Dst,stm32-rtc.yaml45 assigned-clocks:
50 assigned-clock-parents:
101 assigned-clocks: false
102 assigned-clock-parents: false
123 assigned-clocks = <&rcc 1 CLK_RTC>;
124 assigned-clock-parents = <&rcc 1 CLK_LSE>;
/freebsd-13.1/sys/contrib/device-tree/Bindings/watchdog/
H A Dfsl-imx7ulp-wdt.yaml29 assigned-clocks:
32 assigned-clocks-parents:
55 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
56 assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
/freebsd-13.1/sys/contrib/device-tree/Bindings/pwm/
H A Dimx-tpm-pwm.yaml27 assigned-clocks:
30 assigned-clock-parents:
51 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
52 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;

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