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Searched refs:addUse (Results 1 – 25 of 38) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp279 .addUse(TiedDest) in buildUnalignedLoad()
334 .addUse(PseudoMULTuReg); in select()
363 .addUse(Mips::ZERO) in select()
385 .addUse(JTIndex); in select()
393 .addUse(DestAddress) in select()
414 .addUse(Dest); in select()
528 .addUse(HILOReg); in select()
714 .addUse(LUiReg) in select()
812 MIB.addUse(Instruction.RHS); in select()
874 .addUse(Mips::ZERO) in select()
[all …]
H A DMipsISelLowering.cpp4836 .addUse(Hi) in emitLDR_D()
4906 .addUse(Tmp) in emitSTR_W()
4918 .addUse(Tmp) in emitSTR_W()
4922 .addUse(Tmp) in emitSTR_W()
4959 .addUse(Lo) in emitSTR_D()
4978 .addUse(Lo) in emitSTR_D()
4982 .addUse(Hi) in emitSTR_D()
5002 .addUse(Lo) in emitSTR_D()
5006 .addUse(Lo) in emitSTR_D()
5010 .addUse(Hi) in emitSTR_D()
[all …]
H A DMipsSEISelDAGToDAG.cpp135 .addUse(Mips::RA_64, RegState::Undef) in emitMCountABI()
136 .addUse(Mips::ZERO_64); in emitMCountABI()
138 MIB.addUse(Mips::AT_64, RegState::Implicit); in emitMCountABI()
143 .addUse(Mips::RA, RegState::Undef) in emitMCountABI()
144 .addUse(Mips::ZERO); in emitMCountABI()
148 .addUse(Mips::SP) in emitMCountABI()
151 MIB.addUse(Mips::AT, RegState::Implicit); in emitMCountABI()
H A DMipsCallLowering.cpp220 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
473 MIB.addUse(CalleeReg); in lowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp233 .addUse(MisspeculatingTaintReg) in insertTrackingCode()
234 .addUse(AArch64::XZR) in insertTrackingCode()
371 .addUse(AArch64::SP) in insertSPToRegTaintPropagation()
377 .addUse(AArch64::XZR) in insertSPToRegTaintPropagation()
378 .addUse(AArch64::XZR) in insertSPToRegTaintPropagation()
394 .addUse(AArch64::SP) in insertRegToSPTaintPropagation()
401 .addUse(MisspeculatingTaintReg, RegState::Kill) in insertRegToSPTaintPropagation()
406 .addUse(TmpReg, RegState::Kill) in insertRegToSPTaintPropagation()
454 .addUse(Reg); in makeGPRSpeculationSafe()
578 .addUse(SrcReg, RegState::Kill) in expandSpeculationSafeValue()
[all …]
H A DAArch64ExpandPseudoInsts.cpp330 .addUse(AArch64::WZR) in expandCMP_SWAP_128()
331 .addUse(AArch64::WZR) in expandCMP_SWAP_128()
763 .addUse(CtxReg) in expandStoreSwiftAsyncContext()
764 .addUse(BaseReg) in expandStoreSwiftAsyncContext()
780 .addUse(BaseReg) in expandStoreSwiftAsyncContext()
785 .addUse(AArch64::X16) in expandStoreSwiftAsyncContext()
792 .addUse(AArch64::XZR) in expandStoreSwiftAsyncContext()
793 .addUse(CtxReg) in expandStoreSwiftAsyncContext()
797 .addUse(AArch64::X17) in expandStoreSwiftAsyncContext()
802 .addUse(BaseReg) in expandStoreSwiftAsyncContext()
[all …]
H A DAArch64LowerHomogeneousPrologEpilog.cpp314 .addUse(AArch64::SP) in getOrCreateFrameHelper()
330 .addUse(AArch64::LR) in getOrCreateFrameHelper()
558 .addUse(AArch64::SP) in lowerProlog()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2006 .addUse(Hi) in extractF64Exponent()
3223 .addUse(RHS) in legalizeFastUnsafeFDIV()
3251 .addUse(Y) in legalizeFastUnsafeFDIV64()
3295 .addUse(RHS) in legalizeFDIV16()
3296 .addUse(LHS) in legalizeFDIV16()
3394 .addUse(RHS) in legalizeFDIV32()
3395 .addUse(LHS) in legalizeFDIV32()
3420 .addUse(LHS) in legalizeFDIV64()
3421 .addUse(RHS) in legalizeFDIV64()
3436 .addUse(LHS) in legalizeFDIV64()
[all …]
H A DAMDGPURegisterBankInfo.cpp664 .addUse(Reg); in split64BitValueForMapping()
1495 .addUse(RSrc) // rsrc in applyMappingSBufferLoad()
1848 .addUse(VData); in selectStoreIntrinsic()
1851 MIB.addUse(VOffset); in selectStoreIntrinsic()
1853 MIB.addUse(RSrc) in selectStoreIntrinsic()
1854 .addUse(SOffset) in selectStoreIntrinsic()
1877 .addUse(SrcReg); in buildVCopy()
1887 .addUse(SrcReg, 0, AMDGPU::sub0); in buildVCopy()
1890 .addUse(SrcReg, 0, AMDGPU::sub1); in buildVCopy()
1893 .addUse(TmpReg0) in buildVCopy()
[all …]
H A DSIFormMemoryClauses.cpp392 Kill.addUse(Reg, std::get<0>(Op), std::get<1>(Op)); in runOnMachineFunction()
H A DAMDGPUCallLowering.cpp79 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
207 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
365 Ret.addUse(ReturnAddrVReg); in lowerReturn()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp581 .addUse(LHSReg) in insertComparison()
582 .addUse(RHSReg) in insertComparison()
600 .addUse(PrevRes) in insertComparison()
778 .addUse(CondReg) in selectSelect()
794 .addUse(TrueReg) in selectSelect()
795 .addUse(FalseReg) in selectSelect()
888 .addUse(AndResult) in select()
938 .addUse(SrcReg) in select()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp619 RegSequence.addUse(Regs[I]); in createTuple()
991 .addUse(SrcReg) in selectCopy()
1771 Shl.addUse(Src2Reg); in selectVectorSHL()
1858 .addUse(ArgsAddrReg) in selectVaStartDarwin()
1859 .addUse(ListReg) in selectVaStartDarwin()
2817 .addUse(LdReg) in select()
3046 .addUse(SrcReg) in select()
3834 .addUse(SubToRegDef) in selectMergeValues()
4070 .addUse(SrcReg) in selectUnmergeValues()
4096 .addUse(InsReg) in selectUnmergeValues()
[all …]
H A DAArch64LegalizerInfo.cpp1153 .addUse(HSum); in legalizeCTPOP()
1210 .addUse(DesiredI->getOperand(0).getReg()) in legalizeAtomicCmpxchg128()
1212 .addUse(DesiredI->getOperand(1).getReg()) in legalizeAtomicCmpxchg128()
1215 .addUse(NewI->getOperand(0).getReg()) in legalizeAtomicCmpxchg128()
1217 .addUse(NewI->getOperand(1).getReg()) in legalizeAtomicCmpxchg128()
H A DAArch64CallLowering.cpp274 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
449 MIB.addUse(AArch64::X21, RegState::Implicit); in lowerReturn()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp224 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); in buildBrIndirect()
233 .addUse(TablePtr) in buildBrJT()
235 .addUse(IndexReg); in buildBrJT()
805 .addUse(Addr) in buildAtomicCmpXchgWithSuccess()
806 .addUse(CmpVal) in buildAtomicCmpXchgWithSuccess()
807 .addUse(NewVal) in buildAtomicCmpXchgWithSuccess()
830 .addUse(Addr) in buildAtomicCmpXchg()
831 .addUse(CmpVal) in buildAtomicCmpXchg()
832 .addUse(NewVal) in buildAtomicCmpXchg()
H A DRegBankSelect.cpp166 .addUse(Src); in repairReg()
198 MergeBuilder.addUse(SrcReg); in repairReg()
207 UnMergeBuilder.addUse(MO.getReg()); in repairReg()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.cpp763 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu).addUse(VMZu); in expandPseudoLogM()
764 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl).addUse(VMZl); in expandPseudoLogM()
768 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu); in expandPseudoLogM()
769 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl); in expandPseudoLogM()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp109 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
347 MIB.addUse(X86::AL, RegState::Implicit); in lowerCall()
H A DX86FrameLowering.cpp1372 .addUse(MachineFramePtr) in emitPrologue()
1519 .addUse(X86::RSP) in emitPrologue()
1521 .addUse(X86::NoRegister) in emitPrologue()
1523 .addUse(X86::NoRegister) in emitPrologue()
1526 .addUse(X86::RSP) in emitPrologue()
2060 .addUse(MachineFramePtr) in emitEpilogue()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/GlSel/
H A DM68kCallLowering.cpp37 MIB.addUse(PhysReg, RegState::Implicit); in assignValueToReg()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/
H A DValue.h502 void addUse(Use &U) { U.addToList(&UseList); } in addUse() function
863 if (V) V->addUse(*this); in set()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1044 void addUse(SDUse &U) { U.addToList(&UseList); }
1186 if (V.getNode()) V.getNode()->addUse(*this);
1191 V.getNode()->addUse(*this);
1197 if (N) N->addUse(*this);
H A DMachineInstrBuilder.h123 const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0,
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h147 MIB.addUse(Reg); in addSrcToMIB()
150 MIB.addUse(SrcMIB->getOperand(0).getReg()); in addSrcToMIB()

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