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Searched refs:addRegisterClass (Results 1 – 25 of 25) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterBankEmitter.cpp73 void addRegisterClass(const CodeGenRegisterClass *RC) { in addRegisterClass() function in __anonc18d1d2a0111::RegisterBank
295 Bank.addRegisterClass(RC); in run()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp30 addRegisterClass(MVT::v64i8, &Hexagon::HvxVRRegClass); in initializeHVXLowering()
31 addRegisterClass(MVT::v32i16, &Hexagon::HvxVRRegClass); in initializeHVXLowering()
32 addRegisterClass(MVT::v16i32, &Hexagon::HvxVRRegClass); in initializeHVXLowering()
33 addRegisterClass(MVT::v128i8, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
34 addRegisterClass(MVT::v64i16, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
35 addRegisterClass(MVT::v32i32, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
44 addRegisterClass(MVT::v16i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
45 addRegisterClass(MVT::v32i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
46 addRegisterClass(MVT::v64i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
54 addRegisterClass(MVT::v32i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
[all …]
H A DHexagonISelLowering.cpp1472 addRegisterClass(MVT::i1, &Hexagon::PredRegsRegClass); in HexagonTargetLowering()
1473 addRegisterClass(MVT::v2i1, &Hexagon::PredRegsRegClass); // bbbbaaaa in HexagonTargetLowering()
1476 addRegisterClass(MVT::i32, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
1477 addRegisterClass(MVT::v2i16, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
1478 addRegisterClass(MVT::v4i8, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
1479 addRegisterClass(MVT::i64, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1480 addRegisterClass(MVT::v8i8, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1481 addRegisterClass(MVT::v4i16, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1482 addRegisterClass(MVT::v2i32, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1484 addRegisterClass(MVT::f32, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp58 addRegisterClass(MVT::i32, &WebAssembly::I32RegClass); in WebAssemblyTargetLowering()
59 addRegisterClass(MVT::i64, &WebAssembly::I64RegClass); in WebAssemblyTargetLowering()
60 addRegisterClass(MVT::f32, &WebAssembly::F32RegClass); in WebAssemblyTargetLowering()
61 addRegisterClass(MVT::f64, &WebAssembly::F64RegClass); in WebAssemblyTargetLowering()
63 addRegisterClass(MVT::v16i8, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
64 addRegisterClass(MVT::v8i16, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
65 addRegisterClass(MVT::v4i32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
66 addRegisterClass(MVT::v4f32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
67 addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
68 addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp79 addRegisterClass(MVT::i1, &AMDGPU::VReg_1RegClass); in SITargetLowering()
80 addRegisterClass(MVT::i64, &AMDGPU::SReg_64RegClass); in SITargetLowering()
82 addRegisterClass(MVT::i32, &AMDGPU::SReg_32RegClass); in SITargetLowering()
83 addRegisterClass(MVT::f32, &AMDGPU::VGPR_32RegClass); in SITargetLowering()
85 addRegisterClass(MVT::v2i32, &AMDGPU::SReg_64RegClass); in SITargetLowering()
90 addRegisterClass(MVT::f64, V64RegClass); in SITargetLowering()
91 addRegisterClass(MVT::v2f32, V64RegClass); in SITargetLowering()
93 addRegisterClass(MVT::v3i32, &AMDGPU::SGPR_96RegClass); in SITargetLowering()
96 addRegisterClass(MVT::v2i64, &AMDGPU::SGPR_128RegClass); in SITargetLowering()
130 addRegisterClass(MVT::i16, &AMDGPU::SReg_32RegClass); in SITargetLowering()
[all …]
H A DR600ISelLowering.cpp31 addRegisterClass(MVT::f32, &R600::R600_Reg32RegClass); in R600TargetLowering()
32 addRegisterClass(MVT::i32, &R600::R600_Reg32RegClass); in R600TargetLowering()
33 addRegisterClass(MVT::v2f32, &R600::R600_Reg64RegClass); in R600TargetLowering()
34 addRegisterClass(MVT::v2i32, &R600::R600_Reg64RegClass); in R600TargetLowering()
35 addRegisterClass(MVT::v4f32, &R600::R600_Reg128RegClass); in R600TargetLowering()
36 addRegisterClass(MVT::v4i32, &R600::R600_Reg128RegClass); in R600TargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp82 addRegisterClass(MVT::i32, &VE::I32RegClass); in initRegisterClasses()
83 addRegisterClass(MVT::i64, &VE::I64RegClass); in initRegisterClasses()
84 addRegisterClass(MVT::f32, &VE::F32RegClass); in initRegisterClasses()
85 addRegisterClass(MVT::f64, &VE::I64RegClass); in initRegisterClasses()
86 addRegisterClass(MVT::f128, &VE::F128RegClass); in initRegisterClasses()
90 addRegisterClass(VecVT, &VE::V64RegClass); in initRegisterClasses()
91 addRegisterClass(MVT::v256i1, &VE::VMRegClass); in initRegisterClasses()
92 addRegisterClass(MVT::v512i1, &VE::VM512RegClass); in initRegisterClasses()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp68 addRegisterClass(MVT::i32, &Mips::GPR32RegClass); in MipsSETargetLowering()
71 addRegisterClass(MVT::i64, &Mips::GPR64RegClass); in MipsSETargetLowering()
89 addRegisterClass(VecTys[i], &Mips::DSPRRegClass); in MipsSETargetLowering()
127 addRegisterClass(MVT::f16, &Mips::MSA128HRegClass); in MipsSETargetLowering()
172 addRegisterClass(MVT::f32, &Mips::FGR32RegClass); in MipsSETargetLowering()
177 addRegisterClass(MVT::f64, &Mips::FGR64RegClass); in MipsSETargetLowering()
179 addRegisterClass(MVT::f64, &Mips::AFGR64RegClass); in MipsSETargetLowering()
319 addRegisterClass(Ty, RC); in addMSAIntType()
373 addRegisterClass(Ty, RC); in addMSAFloatType()
H A DMips16ISelLowering.cpp125 addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass); in Mips16TargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp61 addRegisterClass(MVT::i64, &BPF::GPRRegClass); in BPFTargetLowering()
63 addRegisterClass(MVT::i32, &BPF::GPR32RegClass); in BPFTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp360 addRegisterClass(MVT::i1, &NVPTX::Int1RegsRegClass); in NVPTXTargetLowering()
361 addRegisterClass(MVT::i16, &NVPTX::Int16RegsRegClass); in NVPTXTargetLowering()
362 addRegisterClass(MVT::i32, &NVPTX::Int32RegsRegClass); in NVPTXTargetLowering()
363 addRegisterClass(MVT::i64, &NVPTX::Int64RegsRegClass); in NVPTXTargetLowering()
364 addRegisterClass(MVT::f32, &NVPTX::Float32RegsRegClass); in NVPTXTargetLowering()
365 addRegisterClass(MVT::f64, &NVPTX::Float64RegsRegClass); in NVPTXTargetLowering()
366 addRegisterClass(MVT::f16, &NVPTX::Float16RegsRegClass); in NVPTXTargetLowering()
367 addRegisterClass(MVT::v2f16, &NVPTX::Float16x2RegsRegClass); in NVPTXTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp87 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass); in SystemZTargetLowering()
89 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass); in SystemZTargetLowering()
90 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass); in SystemZTargetLowering()
93 addRegisterClass(MVT::f32, &SystemZ::VR32BitRegClass); in SystemZTargetLowering()
94 addRegisterClass(MVT::f64, &SystemZ::VR64BitRegClass); in SystemZTargetLowering()
96 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass); in SystemZTargetLowering()
97 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass); in SystemZTargetLowering()
100 addRegisterClass(MVT::f128, &SystemZ::VR128BitRegClass); in SystemZTargetLowering()
102 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass); in SystemZTargetLowering()
105 addRegisterClass(MVT::v16i8, &SystemZ::VR128BitRegClass); in SystemZTargetLowering()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp246 addRegisterClass(MVT::i32, &AArch64::GPR32allRegClass); in AArch64TargetLowering()
247 addRegisterClass(MVT::i64, &AArch64::GPR64allRegClass); in AArch64TargetLowering()
256 addRegisterClass(MVT::f16, &AArch64::FPR16RegClass); in AArch64TargetLowering()
257 addRegisterClass(MVT::bf16, &AArch64::FPR16RegClass); in AArch64TargetLowering()
258 addRegisterClass(MVT::f32, &AArch64::FPR32RegClass); in AArch64TargetLowering()
259 addRegisterClass(MVT::f64, &AArch64::FPR64RegClass); in AArch64TargetLowering()
264 addRegisterClass(MVT::v16i8, &AArch64::FPR8RegClass); in AArch64TargetLowering()
317 addRegisterClass(VT, &AArch64::ZPRRegClass); in AArch64TargetLowering()
321 addRegisterClass(VT, &AArch64::ZPRRegClass); in AArch64TargetLowering()
1601 addRegisterClass(VT, &AArch64::FPR64RegClass); in addDRTypeForNEON()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1422 addRegisterClass(MVT::i32, &SP::IntRegsRegClass); in SparcTargetLowering()
1424 addRegisterClass(MVT::f32, &SP::FPRegsRegClass); in SparcTargetLowering()
1425 addRegisterClass(MVT::f64, &SP::DFPRegsRegClass); in SparcTargetLowering()
1426 addRegisterClass(MVT::f128, &SP::QFPRegsRegClass); in SparcTargetLowering()
1429 addRegisterClass(MVT::i64, &SP::I64RegsRegClass); in SparcTargetLowering()
1433 addRegisterClass(MVT::v2i32, &SP::IntPairRegClass); in SparcTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp156 addRegisterClass(MVT::i32, &PPC::GPRCRegClass); in PPCTargetLowering()
159 addRegisterClass(MVT::f32, &PPC::GPRCRegClass); in PPCTargetLowering()
162 addRegisterClass(MVT::f64, &PPC::SPERCRegClass); in PPCTargetLowering()
164 addRegisterClass(MVT::f32, &PPC::F4RCRegClass); in PPCTargetLowering()
165 addRegisterClass(MVT::f64, &PPC::F8RCRegClass); in PPCTargetLowering()
284 addRegisterClass(MVT::i1, &PPC::CRBITRCRegClass); in PPCTargetLowering()
691 addRegisterClass(MVT::i64, &PPC::G8RCRegClass); in PPCTargetLowering()
888 addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass); in PPCTargetLowering()
889 addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass); in PPCTargetLowering()
890 addRegisterClass(MVT::v8i16, &PPC::VRRCRegClass); in PPCTargetLowering()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp49 addRegisterClass(MVT::i8, &MSP430::GR8RegClass); in MSP430TargetLowering()
50 addRegisterClass(MVT::i16, &MSP430::GR16RegClass); in MSP430TargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp75 addRegisterClass(MVT::i32, &ARC::GPR32RegClass); in ARCTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp58 addRegisterClass(MVT::i8, &M68k::DR8RegClass); in M68kTargetLowering()
59 addRegisterClass(MVT::i16, &M68k::XR16RegClass); in M68kTargetLowering()
60 addRegisterClass(MVT::i32, &M68k::XR32RegClass); in M68kTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp39 addRegisterClass(MVT::i8, &AVR::GPR8RegClass); in AVRTargetLowering()
40 addRegisterClass(MVT::i16, &AVR::DREGSRegClass); in AVRTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp183 addRegisterClass(MVT::i8, &X86::GR8RegClass); in X86TargetLowering()
184 addRegisterClass(MVT::i16, &X86::GR16RegClass); in X86TargetLowering()
185 addRegisterClass(MVT::i32, &X86::GR32RegClass); in X86TargetLowering()
187 addRegisterClass(MVT::i64, &X86::GR64RegClass); in X86TargetLowering()
595 addRegisterClass(MVT::f32, &X86::FR32RegClass); in X86TargetLowering()
597 addRegisterClass(MVT::f64, &X86::RFP64RegClass); in X86TargetLowering()
627 addRegisterClass(MVT::f64, &X86::RFP64RegClass); in X86TargetLowering()
628 addRegisterClass(MVT::f32, &X86::RFP32RegClass); in X86TargetLowering()
682 addRegisterClass(MVT::f80, &X86::RFP80RegClass); in X86TargetLowering()
1448 addRegisterClass(MVT::v1i1, &X86::VK1RegClass); in X86TargetLowering()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp77 addRegisterClass(MVT::i32, &Lanai::GPRRegClass); in LanaiTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp84 addRegisterClass(XLenVT, &RISCV::GPRRegClass); in RISCVTargetLowering()
87 addRegisterClass(MVT::f16, &RISCV::FPR16RegClass); in RISCVTargetLowering()
89 addRegisterClass(MVT::f32, &RISCV::FPR32RegClass); in RISCVTargetLowering()
91 addRegisterClass(MVT::f64, &RISCV::FPR64RegClass); in RISCVTargetLowering()
124 addRegisterClass(VT, RC); in RISCVTargetLowering()
149 addRegisterClass(VT, TRI.getRegClass(RCID)); in RISCVTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp216 addRegisterClass(VT, &ARM::DPRRegClass); in addDRTypeForNEON()
221 addRegisterClass(VT, &ARM::DPairRegClass); in addQRTypeForNEON()
249 addRegisterClass(VT, &ARM::MQPRRegClass); in addMVEVectorTypes()
317 addRegisterClass(VT, &ARM::MQPRRegClass); in addMVEVectorTypes()
385 addRegisterClass(VT, &ARM::MQPRRegClass); in addMVEVectorTypes()
429 addRegisterClass(VT, &ARM::VCCRRegClass); in addMVEVectorTypes()
736 addRegisterClass(MVT::i32, &ARM::tGPRRegClass); in ARMTargetLowering()
738 addRegisterClass(MVT::i32, &ARM::GPRRegClass); in ARMTargetLowering()
742 addRegisterClass(MVT::f32, &ARM::SPRRegClass); in ARMTargetLowering()
743 addRegisterClass(MVT::f64, &ARM::DPRRegClass); in ARMTargetLowering()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2168 void addRegisterClass(MVT VT, const TargetRegisterClass *RC) { in addRegisterClass() function
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp77 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass); in XCoreTargetLowering()