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/freebsd-13.1/sys/contrib/device-tree/Bindings/fsi/
H A Dibm,p9-occ.txt4 This is the binding for the P9 On-Chip Controller accessed over FSI from a
6 nodes. The OCC is not an FSI slave device itself, rather it is accessed
/freebsd-13.1/sys/contrib/device-tree/Bindings/
H A Dresource-names.txt2 normally accessed by index. However, some devices will have multiple
3 values which are more naturally accessed by name. Device nodes can
H A Dcommon-properties.txt15 know the peripheral always needs to be accessed in big endian (BE) mode.
18 peripheral always needs to be accessed in little endian (LE) mode.
/freebsd-13.1/crypto/openssl/doc/man3/
H A DRAND_DRBG_get0_master.pod22 shared DRBG instances which are accessed via the RAND API:
43 The <public> and <private> DRBG instance can be accessed safely, because
/freebsd-13.1/sys/contrib/device-tree/Bindings/hwmon/
H A Dapm-xgene-hwmon.txt3 APM X-Gene SOC sensors are accessed over the "SLIMpro" mailbox.
/freebsd-13.1/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-xgene-slimpro.txt3 An I2C controller accessed over the "SLIMpro" mailbox.
H A Dnvidia,tegra186-bpmp-i2c.txt7 accessed in such a fashion.
/freebsd-13.1/crypto/openssl/ssl/record/
H A DREADME28 entirely private to the record layer and therefore should never be accessed
73 which should only be accessed from rec_layer_d1.c. These are held in the
/freebsd-13.1/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dsnps,arc700-intc.txt15 intc accessed via the special ARC AUX register interface, hence "reg" property
H A Dsnps,archs-intc.txt12 intc accessed via the special ARC AUX register interface, hence "reg" property
H A Dsnps,archs-idu-intc.txt26 The interrupt controller is accessed via the special ARC AUX register
/freebsd-13.1/sys/contrib/device-tree/src/openrisc/
H A Dor1ksim.dts34 * OR1K PIC is built into CPU and accessed via special purpose
H A Dsimple_smp.dts46 * OR1K PIC is built into CPU and accessed via special purpose
/freebsd-13.1/sys/contrib/device-tree/Bindings/timer/
H A Dcsky,mptimer.txt6 regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
H A Dqcom,msm-timer.txt28 - cpu-offset : per-cpu offset used when the timer is accessed without the
/freebsd-13.1/sys/contrib/device-tree/Bindings/arm/
H A Darm-dsu-pmu.txt8 The PMU is accessed via CPU system registers and has no MMIO component.
/freebsd-13.1/crypto/openssl/doc/man7/
H A DRAND_DRBG.pod41 Multiple DRBG instances which are accessed only by a single thread provide
74 DRBG are created per thread and accessed through thread-local storage.
97 The <master> DRBG is intended to be accessed concurrently for reseeding
102 instance of each per thread. So they can safely be accessed without
111 accessed and used by multiple threads.
/freebsd-13.1/sys/contrib/device-tree/Bindings/pci/
H A Dti-pci.txt47 they are locally accessed within the DIF CS space
49 they are locally accessed within the DIF CS2 space
H A Dhost-generic-pci.yaml22 accessed via an ioport) and laid out with a direct correspondence to the
92 The Configuration Space base address and size, as accessed from the parent
/freebsd-13.1/sys/contrib/device-tree/Bindings/mailbox/
H A Dhisilicon,hi3660-mailbox.txt5 processors, MCU, HIFI, etc. Each channel is unidirectional and accessed
/freebsd-13.1/sys/contrib/device-tree/Bindings/bus/
H A Dnvidia,tegra210-aconnect.txt21 All devices accessed via the ACONNNECT are described by child-nodes.
H A Drenesas,bsc.yaml20 connected to the BSC can be accessed, the PM domain containing the BSC
/freebsd-13.1/sys/contrib/openzfs/config/
H A Dkernel-xattr-handler.m4121 dnl # should be accessed by handler->flags.
238 dnl # should be accessed by handler->flags.
323 dnl # and should be accessed by handler->flags.
/freebsd-13.1/sys/contrib/device-tree/Bindings/arm/stm32/
H A Dst,mlahb.yaml16 parts can be accessed through different addresses (see "RAM aliases" in [1])
/freebsd-13.1/sys/contrib/device-tree/Bindings/mmc/
H A Damlogic,meson-mx-sdio.txt10 to be controlled. Only one slot can be accessed at a time.

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