| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 4088 unsigned NumElts = WideVT.getVectorNumElements(); in WidenVecRes_MGATHER() 4328 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask() local 4330 MaskVT = WideVT; in WidenVSELECTMask() 4719 Res = DAG.getNode(Opcode, dl, WideVT, InOp); in WidenVecOp_Convert() 4916 EVT WideVT = StVal.getValueType(); in WidenVecOp_MSTORE() local 4927 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), in WidenVecOp_MSTORE() local 4930 StVal = ModifyToType(StVal, WideVT); in WidenVecOp_MSTORE() 5077 EVT WideVT = Op.getValueType(); in WidenVecOp_VECREDUCE() local 5088 unsigned WideElts = WideVT.getVectorNumElements(); in WidenVecOp_VECREDUCE() 5103 EVT WideVT = Op.getValueType(); in WidenVecOp_VECREDUCE_SEQ() local [all …]
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| H A D | TargetLowering.cpp | 8450 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in expandMULO() 8465 } else if (isTypeLegal(WideVT)) { in expandMULO() 8466 LHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, LHS); in expandMULO() 8467 RHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, RHS); in expandMULO() 8468 SDValue Mul = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS); in expandMULO() 8471 getShiftAmountTy(WideVT, DAG.getDataLayout())); in expandMULO() 8483 if (WideVT == MVT::i16) in expandMULO() 8485 else if (WideVT == MVT::i32) in expandMULO() 8487 else if (WideVT == MVT::i64) in expandMULO() 8489 else if (WideVT == MVT::i128) in expandMULO() [all …]
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| H A D | LegalizeIntegerTypes.cpp | 930 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VTSize * 2); in earlyExpandDIVFIX() local 932 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in earlyExpandDIVFIX() 935 LHS = DAG.getSExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX() 936 RHS = DAG.getSExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX() 938 LHS = DAG.getZExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX() 939 RHS = DAG.getZExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX()
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| H A D | DAGCombiner.cpp | 7331 EVT WideVT = EVT::getIntegerVT(Context, WideNumBits); in mergeTruncStores() local 7332 if (WideVT != MVT::i16 && WideVT != MVT::i32 && WideVT != MVT::i64) in mergeTruncStores() 7374 else if (SourceValue.getValueType() != WideVT) { in mergeTruncStores() 7375 if (WideVal.getValueType() == WideVT || in mergeTruncStores() 7410 bool Allowed = TLI.allowsMemoryAccess(Context, Layout, WideVT, in mergeTruncStores() 7444 if (WideVT != SourceValue.getValueType()) { in mergeTruncStores() 7457 SDValue RotAmt = DAG.getConstant(WideNumBits / 2, DL, WideVT); in mergeTruncStores() 10001 unsigned WideWidth = WideVT.getScalarSizeInBits(); in visitVSELECT() 10007 TLI.isOperationLegalOrCustom(ISD::SETCC, WideVT)) { in visitVSELECT() 10013 SDValue WideLHS = DAG.getNode(ExtOpcode, DL, WideVT, LHS); in visitVSELECT() [all …]
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| H A D | SelectionDAG.cpp | 10255 EVT WideVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(), in WidenVector() local 10257 return getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, getUNDEF(WideVT), N, in WidenVector()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 3950 EVT WideVT = MVT::i32; in lowerATOMIC_LOAD_OP() local 3951 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP() 3977 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP() 3981 SDValue NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT, in lowerATOMIC_LOAD_OP() 3990 Src2 = DAG.getNode(ISD::SHL, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 3994 Src2 = DAG.getNode(ISD::OR, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 3998 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP() 4000 DAG.getConstant(BitSize, DL, WideVT) }; in lowerATOMIC_LOAD_OP() 4065 EVT WideVT = NarrowVT == MVT::i64 ? MVT::i64 : MVT::i32; in lowerATOMIC_CMP_SWAP() local 4066 if (NarrowVT == WideVT) { in lowerATOMIC_CMP_SWAP() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 13631 if (!WideVT.is256BitVector()) in lowerShuffleOfExtractsAsVperm() 13656 SDValue Shuf = DAG.getVectorShuffle(WideVT, DL, WideVec, DAG.getUNDEF(WideVT), in lowerShuffleOfExtractsAsVperm() 18196 MVT WideVT = VT; in lower1BitShuffleAsKSHIFTR() local 18299 MVT WideVT = VT; in lower1BitShuffle() local 20905 MVT WideVT = ExtVT; in LowerZERO_EXTEND_Mask() local 20927 if (WideVT != VT) in LowerZERO_EXTEND_Mask() 21393 IsStrict ? DAG.getConstantFP(0.0, dl, WideVT) : DAG.getUNDEF(WideVT); in LowerFP_TO_INT() 21424 IsStrict ? DAG.getConstantFP(0.0, dl, WideVT) : DAG.getUNDEF(WideVT); in LowerFP_TO_INT() 24098 MVT WideVT = ExtVT; in LowerSIGN_EXTEND_Mask() local 24125 if (WideVT != VT) in LowerSIGN_EXTEND_Mask() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1664 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectLoadLane() local 1668 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane() 1716 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectPostLoadLane() local 1720 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 10549 EVT WideVT = InVT.widenIntegerVectorElementType(*(DAG.getContext())); in LowerINSERT_SUBVECTOR() local 10550 SDValue ExtVec = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1); in LowerINSERT_SUBVECTOR() 10553 SDValue HiVec0 = DAG.getNode(AArch64ISD::UUNPKHI, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR() 10556 SDValue LoVec0 = DAG.getNode(AArch64ISD::UUNPKLO, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 7791 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in LowerTRUNCATEVector() local 7807 Op2 = DAG.getUNDEF(WideVT); in LowerTRUNCATEVector() 7825 Op1 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op1); in LowerTRUNCATEVector() 7826 Op2 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op2); in LowerTRUNCATEVector() 7827 return DAG.getVectorShuffle(WideVT, DL, Op1, Op2, ShuffV); in LowerTRUNCATEVector() 8361 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in widenVec() local 8370 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WideVT, Ops); in widenVec() 8392 EVT WideVT = Wide.getValueType(); in LowerINT_TO_FPVector() local 8393 unsigned WideNumElts = WideVT.getVectorNumElements(); in LowerINT_TO_FPVector() 8410 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); in LowerINT_TO_FPVector() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1792 EVT WideVT = WideVal.getValueType(); in EmitTest() local 1819 if (TLI.isOperationLegal(WideVal.getOpcode(), WideVT)) { in EmitTest()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 3348 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerINSERT_VECTOR_ELT() local 3349 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerINSERT_VECTOR_ELT() 3350 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideVT, Vec, Val, Idx); in lowerINSERT_VECTOR_ELT() 3446 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerEXTRACT_VECTOR_ELT() local 3447 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerEXTRACT_VECTOR_ELT()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2950 EVT WideVT = MVT::i128; in LowerUMULO_SMULO() local 2967 RTLIB::MUL_I128, WideVT, in LowerUMULO_SMULO()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1653 EVT WideVT = in WidenOrSplitVectorLoad() local 1658 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue, in WidenOrSplitVectorLoad()
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