Searched refs:Vec2 (Results 1 – 6 of 6) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTStructuralEquivalence.cpp | 810 const auto *Vec2 = cast<DependentSizedExtVectorType>(T2); in IsStructurallyEquivalent() local 812 Vec2->getSizeExpr())) in IsStructurallyEquivalent() 815 Vec2->getElementType())) in IsStructurallyEquivalent() 822 const auto *Vec2 = cast<DependentVectorType>(T2); in IsStructurallyEquivalent() local 823 if (Vec1->getVectorKind() != Vec2->getVectorKind()) in IsStructurallyEquivalent() 826 Vec2->getSizeExpr())) in IsStructurallyEquivalent() 829 Vec2->getElementType())) in IsStructurallyEquivalent() 837 const auto *Vec2 = cast<VectorType>(T2); in IsStructurallyEquivalent() local 839 Vec2->getElementType())) in IsStructurallyEquivalent() 841 if (Vec1->getNumElements() != Vec2->getNumElements()) in IsStructurallyEquivalent() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1838 SDValue Vec2; in ExpandBVWithShuffles() local 1840 Vec2 = IntermedVals[1].first; in ExpandBVWithShuffles() 1842 Vec2 = DAG.getUNDEF(VT); in ExpandBVWithShuffles() 1851 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBVWithShuffles() 1953 SDValue Vec2; in ExpandBUILD_VECTOR() local 1955 Vec2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value2); in ExpandBUILD_VECTOR() 1957 Vec2 = DAG.getUNDEF(VT); in ExpandBUILD_VECTOR() 1960 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBUILD_VECTOR()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 303 Value *Vec2 = nullptr; in isShuffle() local 329 else if (!Vec2 || Vec2 == Vec) in isShuffle() 330 Vec2 = Vec; in isShuffle() 344 if (CommonShuffleMode == Select && Vec2) in isShuffle() 348 return Vec2 ? TargetTransformInfo::SK_PermuteTwoSrc in isShuffle()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 4325 Value *Vec1, *Vec2, *Mask; in parseFunctionBody() local 4327 popValue(Record, OpNum, NextValueNo, Vec1->getType(), Vec2)) in parseFunctionBody() 4332 if (!Vec1->getType()->isVectorTy() || !Vec2->getType()->isVectorTy()) in parseFunctionBody() 4335 I = new ShuffleVectorInst(Vec1, Vec2, Mask); in parseFunctionBody()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 10594 SDValue Vec2 = Op2.getOperand(0); in performFMACombine() local 10619 if (Vec1 == Vec2 || Vec3 == Vec4) in performFMACombine() 10622 if (Vec1.getValueType() != MVT::v2f16 || Vec2.getValueType() != MVT::v2f16) in performFMACombine() 10625 if ((Vec1 == Vec3 && Vec2 == Vec4) || in performFMACombine() 10626 (Vec1 == Vec4 && Vec2 == Vec3)) { in performFMACombine() 10627 return DAG.getNode(AMDGPUISD::FDOT2, SL, MVT::f32, Vec1, Vec2, FMAAcc, in performFMACombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrPrefix.td | 1603 dag Vec2 = (v4i32 (EXTRACT_SUBREG Pair1, sub_vsx0)); 1619 Extracts.Vec2>;
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