Searched refs:Vec0 (Results 1 – 6 of 6) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 867 auto *Vec0 = dyn_cast<ConstantVector>(Mask0); in isNonTargetIntrinsicMatch() local
869 if (!Vec0 || !Vec1) in isNonTargetIntrinsicMatch()
871 assert(Vec0->getType() == Vec1->getType() && in isNonTargetIntrinsicMatch()
873 for (int i = 0, e = Vec0->getNumOperands(); i != e; ++i) { in isNonTargetIntrinsicMatch()
874 Constant *Elem0 = Vec0->getOperand(i); in isNonTargetIntrinsicMatch()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 2317 SDValue Vec0 = N->getOperand(0); in selectShuffle() local
2320 Results.push(TargetOpcode::COPY, ResTy, {Vec0}); in selectShuffle()
2334 Done = scalarizeShuffle(Mask, SDLoc(N), ResTy, Vec0, Vec1, N); in selectShuffle()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrPrefix.td | 1601 dag Vec0 = (v4i32 (EXTRACT_SUBREG Pair0, sub_vsx0));
1615 Extracts.Vec0>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 5619 SDValue Vec0 = SVN->getOperand(VecIdx0); in lowerVECTOR_SHUFFLE() local
5621 Vec0, DAG.getConstant(EltIdx0, SL, MVT::i32)); in lowerVECTOR_SHUFFLE()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 10541 SDValue Vec0 = Op.getOperand(0); in LowerINSERT_SUBVECTOR() local
10553 SDValue HiVec0 = DAG.getNode(AArch64ISD::UUNPKHI, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
10556 SDValue LoVec0 = DAG.getNode(AArch64ISD::UUNPKLO, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 44594 SDValue Vec0 = N0.getOperand(0); in combineBitOpWithMOVMSK() local
44596 EVT VecVT0 = Vec0.getValueType(); in combineBitOpWithMOVMSK()
44609 DAG.getNode(VecOpc, DL, VecVT0, Vec0, DAG.getBitcast(VecVT0, Vec1)); in combineBitOpWithMOVMSK()
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