Searched refs:ValLoc (Results 1 – 5 of 5) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | Analysis.cpp | 263 SmallVectorImpl<unsigned> &ValLoc, in getNoopInput() argument
311 if (ValLoc.size() >= InsertLoc.size() && in getNoopInput()
312 std::equal(InsertLoc.begin(), InsertLoc.end(), ValLoc.rbegin())) { in getNoopInput()
316 ValLoc.resize(ValLoc.size() - InsertLoc.size()); in getNoopInput()
328 ValLoc.append(ExtractLoc.rbegin(), ExtractLoc.rend()); in getNoopInput()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 7322 Value *Ptr, *Val; LocTy PtrLoc, ValLoc; in parseAtomicRMW() local
7361 parseTypeAndValue(Val, ValLoc, PFS) || in parseAtomicRMW()
7372 return error(ValLoc, "atomicrmw value and pointer type do not match"); in parseAtomicRMW()
7377 return error(ValLoc, in parseAtomicRMW()
7383 return error(ValLoc, "atomicrmw " + in parseAtomicRMW()
7389 return error(ValLoc, "atomicrmw " + in parseAtomicRMW()
7397 return error(ValLoc, "atomicrmw operand must be power-of-two byte-sized" in parseAtomicRMW()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/TableGen/ |
| H A D | TGParser.cpp | 2721 SMLoc ValLoc = Lex.getLoc(); in ParseDeclaration() local
2724 SetValue(CurRec, ValLoc, DeclName, None, Val)) in ParseDeclaration()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 6021 SMLoc ValLoc = getLoc(); in parseCnt() local
6042 Error(ValLoc, "too large value for " + CntName); in parseCnt()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2630 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, Dl, ValLoc, ValArg, in lowerMasksToReg()
2633 if ((ValVT == MVT::v8i1 && (ValLoc == MVT::i8 || ValLoc == MVT::i32)) || in lowerMasksToReg()
2634 (ValVT == MVT::v16i1 && (ValLoc == MVT::i16 || ValLoc == MVT::i32))) { in lowerMasksToReg()
2640 if (ValLoc == MVT::i32) in lowerMasksToReg()
2641 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValToCopy); in lowerMasksToReg()
2645 if ((ValVT == MVT::v32i1 && ValLoc == MVT::i32) || in lowerMasksToReg()
2646 (ValVT == MVT::v64i1 && ValLoc == MVT::i64)) { in lowerMasksToReg()
2649 return DAG.getBitcast(ValLoc, ValArg); in lowerMasksToReg()
2652 return DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValArg); in lowerMasksToReg()
3001 const EVT &ValLoc, const SDLoc &Dl, in lowerRegToMasks() argument
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