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Searched refs:Val2 (Results 1 – 16 of 16) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DBypassSlowDivision.h42 static bool isEqual(const DivRemMapKey &Val1, const DivRemMapKey &Val2) {
43 return Val1.SignedOp == Val2.SignedOp && Val1.Dividend == Val2.Dividend &&
44 Val1.Divisor == Val2.Divisor;
/freebsd-13.1/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DGTestChecker.cpp116 static ProgramStateRef assumeValuesEqual(SVal Val1, SVal Val2,
270 ProgramStateRef GTestChecker::assumeValuesEqual(SVal Val1, SVal Val2, in assumeValuesEqual() argument
274 !Val2.getAs<DefinedOrUnknownSVal>()) in assumeValuesEqual()
279 Val2.castAs<DefinedOrUnknownSVal>()); in assumeValuesEqual()
H A DMismatchedIteratorChecker.cpp40 const SVal &Val2, CheckerContext &C,
280 const SVal &Val2, in reportBug() argument
286 R->markInteresting(Val2); in reportBug()
/freebsd-13.1/contrib/llvm-project/clang/lib/CodeGen/
H A DCGAtomic.cpp367 Address Val1, Address Val2, in emitAtomicCmpXchg() argument
374 llvm::Value *Desired = CGF.Builder.CreateLoad(Val2); in emitAtomicCmpXchg()
417 Address Val1, Address Val2, in emitAtomicCmpXchgFailureSet() argument
473 emitAtomicCmpXchg(CGF, E, IsWeak, Dest, Ptr, Val1, Val2, in emitAtomicCmpXchgFailureSet()
513 Address Ptr, Address Val1, Address Val2, in EmitAtomicOp() argument
703 Address Ptr, Address Val1, Address Val2, in EmitAtomicOp() argument
793 Address Val2 = Address::invalid(); in EmitAtomicExpr() local
864 Val2 = EmitPointerWithAlignment(E->getVal2()); in EmitAtomicExpr()
866 Val2 = EmitValToTemp(*this, E->getVal2()); in EmitAtomicExpr()
944 if (Val2.isValid()) in EmitAtomicExpr()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/IR/
H A DConstants.cpp1606 APFloat Val2 = APFloat(Val); in isValueValidForType() local
1614 if (&Val2.getSemantics() == &APFloat::IEEEhalf()) in isValueValidForType()
1620 if (&Val2.getSemantics() == &APFloat::BFloat()) in isValueValidForType()
1626 if (&Val2.getSemantics() == &APFloat::IEEEsingle()) in isValueValidForType()
1632 if (&Val2.getSemantics() == &APFloat::IEEEhalf() || in isValueValidForType()
1633 &Val2.getSemantics() == &APFloat::BFloat() || in isValueValidForType()
1635 &Val2.getSemantics() == &APFloat::IEEEdouble()) in isValueValidForType()
1642 &Val2.getSemantics() == &APFloat::BFloat() || in isValueValidForType()
1648 &Val2.getSemantics() == &APFloat::BFloat() || in isValueValidForType()
1651 &Val2.getSemantics() == &APFloat::IEEEquad(); in isValueValidForType()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankCombiner.cpp55 Register Val0, Val1, Val2; member
138 {MatchInfo.Val0, MatchInfo.Val1, MatchInfo.Val2}, MI.getFlags()); in applyMed3()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLibCallsShrinkWrap.cpp105 CmpInst::Predicate Cmp2, float Val2) { in createOrCond() argument
108 auto Cond2 = createCond(BBBuilder, Arg, Cmp2, Val2); in createOrCond()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/ProfileData/
H A DInstrProf.h644 static inline double score(uint64_t Val1, uint64_t Val2, double Sum1, in score()
648 return std::min(Val1 / Sum1, Val2 / Sum2); in score()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp3096 SDValue Val2 = Ins2.getOperand(1); in tryInsertVectorElt() local
3097 if (Val1.getOpcode() == ISD::FP_ROUND || Val2.getOpcode() == ISD::FP_ROUND) in tryInsertVectorElt()
3103 (Val2.getOpcode() == ISD::EXTRACT_VECTOR_ELT || in tryInsertVectorElt()
3104 Val2.getOpcode() == ARMISD::VGETLANEu) && in tryInsertVectorElt()
3106 isa<ConstantSDNode>(Val2.getOperand(1)) && in tryInsertVectorElt()
3109 (Val2.getOperand(0).getValueType() == MVT::v8f16 || in tryInsertVectorElt()
3110 Val2.getOperand(0).getValueType() == MVT::v8i16)) { in tryInsertVectorElt()
3112 unsigned ExtractLane2 = Val2.getConstantOperandVal(1); in tryInsertVectorElt()
3116 if (Val1.getOperand(0) == Val2.getOperand(0) && ExtractLane2 % 2 == 0 && in tryInsertVectorElt()
3133 ARM::ssub_0 + ExtractLane2 / 2, dl, MVT::f32, Val2.getOperand(0)); in tryInsertVectorElt()
[all …]
H A DARMBaseInstrInfo.h844 bool HasLowerConstantMaterializationCost(unsigned Val1, unsigned Val2,
H A DARMBaseInstrInfo.cpp5534 bool llvm::HasLowerConstantMaterializationCost(unsigned Val1, unsigned Val2, in HasLowerConstantMaterializationCost() argument
5539 unsigned Cost2 = ConstantMaterializationCost(Val2, Subtarget, ForCodesize); in HasLowerConstantMaterializationCost()
5547 ConstantMaterializationCost(Val2, Subtarget, !ForCodesize); in HasLowerConstantMaterializationCost()
H A DARMISelLowering.cpp5230 int64_t Val2 = cast<ConstantSDNode>(K2)->getSExtValue(); in LowerSaturatingConditional() local
5231 int64_t PosVal = std::max(Val1, Val2); in LowerSaturatingConditional()
5232 int64_t NegVal = std::min(Val1, Val2); in LowerSaturatingConditional()
5234 if (!((Val1 > Val2 && isLTorLE(CC1)) || (Val1 < Val2 && isLTorLE(CC2))) || in LowerSaturatingConditional()
5243 if (Val1 == ~Val2) in LowerSaturatingConditional()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCalls.cpp1284 const APInt *Val, *Val2; in visitCallInst() local
1291 match(Other->getArgOperand(1), m_APInt(Val2))) { in visitCallInst()
1293 NewVal = Val->uadd_sat(*Val2); in visitCallInst()
1294 else if (Val->isNonNegative() == Val2->isNonNegative()) { in visitCallInst()
1296 NewVal = Val->sadd_ov(*Val2, Overflow); in visitCallInst()
/freebsd-13.1/contrib/llvm-project/clang/lib/AST/
H A DASTStructuralEquivalence.cpp1634 llvm::APSInt Val2 = EC2->getInitVal(); in IsStructurallyEquivalent() local
1635 if (!llvm::APSInt::isSameValue(Val1, Val2) || in IsStructurallyEquivalent()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp129 APFloat Val2 = APFloat(Val); in isValueValidForType() local
131 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT), in isValueValidForType()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp13853 SDValue Val2 = Op2.getOperand(0); in performUADDVCombine() local
13856 SDValue AddVal = DAG.getNode(ISD::ADD, DL, ValVT, Val1, Val2); in performUADDVCombine()