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Searched refs:VPR (Results 1 – 18 of 18) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVEVPTBlockPass.cpp75 if (CmpMI->modifiesRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
77 if (CmpMI->readsRegister(ARM::VPR, TRI)) in findVCMPToFoldIntoVPST()
135 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR)) in IsVPRDefinedOrKilledByBlock()
H A DMVETPAndVPTOptimisationsPass.cpp901 Register VPR = Instr.getOperand(PIdx + 1).getReg(); in ReplaceConstByVPNOTs() local
902 if (!VPR.isVirtual()) in ReplaceConstByVPNOTs()
906 MachineInstr *Copy = MRI->getVRegDef(VPR); in ReplaceConstByVPNOTs()
930 if (LastVPTReg != 0 && LastVPTReg != VPR && LastVPTImm == Imm) { in ReplaceConstByVPNOTs()
932 if (MRI->use_empty(VPR)) { in ReplaceConstByVPNOTs()
949 if (MRI->use_empty(VPR)) { in ReplaceConstByVPNOTs()
956 VPR = NewVPR; in ReplaceConstByVPNOTs()
960 LastVPTReg = VPR; in ReplaceConstByVPNOTs()
H A DARMLowOverheadLoops.cpp84 return PIdx != -1 && MI->getOperand(PIdx + 1).getReg() == ARM::VPR; in isVectorPredicated()
88 return MI->findRegisterDefOperandIdx(ARM::VPR) != -1; in isVectorPredicate()
92 return MI.findRegisterUseOperandIdx(ARM::VPR) != -1; in hasVPRUse()
189 assert((CurrentPredicates.size() || MI->getParent()->isLiveIn(ARM::VPR)) in CreateVPTBlock()
996 if (RegMask.PhysReg == ARM::VPR) in ValidateLiveOuts()
1196 if (!MO.isReg() || !MO.isUse() || MO.getReg() != ARM::VPR) in ValidateMVEInst()
1631 MachineInstr *VprDef = RDA->getUniqueReachingMIDef(VPST, ARM::VPR); in ConvertVPTBlocks()
H A DARMRegisterInfo.td201 // on the instruction they are used in and for VPR 32 was chosen such that it
203 def VPR : ARMReg<32, "vpr">;
386 def VCCR : RegisterClass<"ARM", [i32, v16i1, v8i1, v4i1], 32, (add VPR)> {
444 // Scalar single and double precision floating point and VPR register class,
447 def FPWithVPR : RegisterClass<"ARM", [f32], 32, (add SPR, DPR, VPR)> {
H A DARMInstrVFP.td326 let Defs = [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7, VPR, FPSCR, FPSCR_NZCV];
2487 // System level VPR/P0 -> GPR
2488 let Uses = [VPR] in
2558 // System level GPR -> VPR/P0
2559 let Defs = [VPR] in
2847 let Uses = [VPR] in {
2853 let Defs = [VPR] in {
H A DARMExpandPseudoInsts.cpp1276 VSCCLRM.addReg(ARM::VPR, RegState::Define); in CMSEClearFPRegsV81()
1287 VSCCLRM.addReg(ARM::VPR, RegState::Define); in CMSEClearFPRegsV81()
1365 for (auto R : {ARM::VPR, ARM::FPSCR, ARM::FPSCR_NZCV, ARM::Q0, ARM::Q1, in CMSESaveClearFPRegsV8()
1459 for (auto R : {ARM::VPR, ARM::FPSCR, ARM::FPSCR_NZCV, ARM::Q0, ARM::Q1, in CMSESaveClearFPRegsV81()
H A DARMBaseInstrInfo.cpp880 MIB.addReg(ARM::VPR, RegState::Implicit); in addPredicatedMveVpredNOp()
988 } else if (DestReg == ARM::VPR) { in copyPhysReg()
994 } else if (SrcReg == ARM::VPR) { in copyPhysReg()
H A DARMInstrMVE.td4434 // example when moving between rGPR and VPR.P0 as part of predicate vector
6551 let Defs = [VPR];
6663 let Defs = [VPR];
6710 let Uses = [VPR];
H A DARMInstrFormats.td224 // always either zero_reg or VPR, but needs to be modelled as an
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/ProfileData/
H A DInstrProfData.inc456 getValueProfRecordNext(ValueProfRecord *VPR);
458 getValueProfRecordValueData(ValueProfRecord *VPR);
/freebsd-13.1/contrib/llvm-project/compiler-rt/include/profile/
H A DInstrProfData.inc456 getValueProfRecordNext(ValueProfRecord *VPR);
458 getValueProfRecordValueData(ValueProfRecord *VPR);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp5925 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeForVMRSandVMSR()
5946 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeForVMRSandVMSR()
6136 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeVSCCLRM()
6603 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMVEVCMP()
6640 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMveVCTP()
6650 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMVEVPNOT()
6651 Inst.addOperand(MCOperand::createReg(ARM::VPR)); in DecodeMVEVPNOT()
/freebsd-13.1/sys/contrib/device-tree/src/arm/
H A Dtegra124-venice2.dts57 * it after having set the VPR up
H A Dtegra124-apalis.dtsi62 * it after having set the VPR up
H A Dtegra124-jetson-tk1.dts78 * it after having set the VPR up
H A Dtegra124-apalis-v1.2.dtsi63 * it after having set the VPR up
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp3720 if (Regs.back().second == ARM::VPR) in CreateRegList()
3726 if (Regs.back().second == ARM::VPR) in CreateRegList()
4566 if (Reg == ARM::VPR && in parseRegisterList()
/freebsd-13.1/contrib/ncurses/misc/
H A Dterminfo.src3394 # + in ECMA-48 cursor movement, VPR and HPR fail. Others work.
3471 # supports CHA, VPA, VPR, but no other ECMA-48 cursor movement such as HPA
3525 # supports CBT, CHA, VPA, CNL, CPL, VPR (no HPA, CHT, HPR)
6764 # CBT, CHT, HPR, CNL,CPL, VPR do not work
23840 # VPR Vert. Position Relative \E [ Pn e 1 FE - (R)
23967 # (R) Some ANSI.SYS versions accept VPR, but more commonly `ANSI' terminals
23968 # use CUD for this function and ignore VPR. ECMA calls it `Line Position