Searched refs:VLD (Results 1 – 8 of 8) sorted by relevance
| /freebsd-13.1/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | mediatek,iommu.txt | 40 OVL0 RDMA0 WDMA0 MC PP VLD 50 in each larb. Take a example, There are many ports like MC, PP, VLD in the
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Schedule.td | 85 // Read the unwritten lanes of the VLD's destination registers.
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM4.td | 114 def : M4UnitL2I<(instregex "VLD")>;
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| H A D | ARMInstrInfo.td | 1307 // VLD/VST instructions and checking the alignment is not specified. 1318 // VLD/VST instructions and checking the alignment value. 1329 // VLD/VST instructions and checking the alignment value. 1340 // VLD/VST instructions and checking the alignment value. 1351 // for VLD/VST instructions and checking the alignment value. 1362 // encoding for VLD/VST instructions and checking the alignment value. 1372 // Special version of addrmode6 to handle alignment encoding for VLD-dup 1393 // VLD-dup instruction and checking the alignment is not specified. 1403 // Special version of addrmode6 to handle 16-bit alignment encoding for VLD-dup 1425 // Special version of addrmode6 to handle 64-bit alignment encoding for VLD [all …]
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| H A D | ARMScheduleA57.td | 145 "VLD(1|2)LN(d|q)(WB_fixed_|WB_register_)?Asm", 146 "VLD(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
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| H A D | ARMISelLowering.cpp | 15352 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local 15353 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP() 15357 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP() 15374 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP() 15375 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP() 15393 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP() 15394 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP() 15395 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP() 15400 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP() 15416 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
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| H A D | ARMInstrNEON.td | 555 // Classes for VLD* pseudo-instructions with multi-register operands. 1001 // Classes for VLD*LN pseudo-instructions with multi-register operands.
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrVec.td | 100 // Multiclass for VLD instructions 134 // Section 8.9.1 - VLD (Vector Load) 135 defm VLD : VLDm<"vld", 0x81, V64>;
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