| /freebsd-13.1/crypto/openssl/crypto/bn/asm/ |
| H A D | ppc.pl | 119 $UDIV= "divwu"; # unsigned divide
143 $UDIV= "divdu"; # unsigned divide
1680 $UDIV r8,r3,r9 #q = h/dh
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiTargetTransformInfo.h | 101 case ISD::UDIV:
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| H A D | LanaiISelLowering.cpp | 107 setOperationAction(ISD::UDIV, MVT::i32, Expand); in LanaiTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/compiler-rt/lib/builtins/arm/ |
| H A D | umodsi3.S | 70 # error THUMB mode requires CLZ or UDIV
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| H A D | udivmodsi4.S | 73 # error THUMB mode requires CLZ or UDIV
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| H A D | udivsi3.S | 96 # error THUMB mode requires CLZ or UDIV
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 1282 { ISD::UDIV, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
1286 { ISD::UDIV, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
1290 { ISD::UDIV, MVT::v4i16, ReciprocalDivCost}, in getArithmeticInstrCost()
1294 { ISD::UDIV, MVT::v8i8, ReciprocalDivCost}, in getArithmeticInstrCost()
1299 { ISD::UDIV, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
1303 { ISD::UDIV, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
1307 { ISD::UDIV, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
1311 { ISD::UDIV, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
1813 case ISD::UDIV: in maybeLoweredToCall()
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| H A D | ARMScheduleSwift.td | 321 (instregex "SDIV", "UDIV", "t2SDIV", "t2UDIV")>;
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 306 if (ISD == ISD::UDIV) in getArithmeticInstrCost()
343 { ISD::UDIV, MVT::v16i32, 5 }, // pmuludq sequence in getArithmeticInstrCost()
363 { ISD::UDIV, MVT::v8i32, 5 }, // pmuludq sequence in getArithmeticInstrCost()
389 { ISD::UDIV, MVT::v4i32, 5 }, // pmuludq sequence in getArithmeticInstrCost()
408 { ISD::UDIV, MVT::v32i16, 6 }, // vpmulhuw sequence in getArithmeticInstrCost()
423 { ISD::UDIV, MVT::v16i32, 15 }, // vpmuludq sequence in getArithmeticInstrCost()
431 { ISD::UDIV, MVT::v32i16, 12 }, // 2*vpmulhuw sequence in getArithmeticInstrCost()
450 { ISD::UDIV, MVT::v16i16, 6 }, // vpmulhuw sequence in getArithmeticInstrCost()
454 { ISD::UDIV, MVT::v8i32, 15 }, // vpmuludq sequence in getArithmeticInstrCost()
480 { ISD::UDIV, MVT::v8i16, 6 }, // pmulhuw sequence in getArithmeticInstrCost()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 243 UDIV, enumerator
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 342 case ISD::UDIV: { in Select()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1932 case ISD::UDIV: in selectDivRem()
1934 DivOpc = Mips::UDIV; in selectDivRem()
2047 if (!selectBinaryOp(I, ISD::UDIV)) in fastSelectInstruction()
2048 return selectDivRem(I, ISD::UDIV); in fastSelectInstruction()
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| H A D | MipsSEISelLowering.cpp | 241 setOperationAction(ISD::UDIV, MVT::i32, Legal); in MipsSETargetLowering()
288 setOperationAction(ISD::UDIV, MVT::i64, Legal); in MipsSETargetLowering()
347 setOperationAction(ISD::UDIV, Ty, Legal); in addMSAIntType()
1816 return DAG.getNode(ISD::UDIV, DL, Op->getValueType(0), Op->getOperand(1), in lowerINTRINSIC_WO_CHAIN()
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| H A D | MipsScheduleP5600.td | 193 def : InstRW<[P5600WriteAL2DivU], (instrs DIVU, PseudoUDIV, UDIV)>;
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.h | 698 void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); } in visitUDiv()
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| H A D | SelectionDAGDumper.cpp | 237 case ISD::UDIV: return "udiv"; in getOperationName()
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| H A D | FastISel.cpp | 1715 return selectBinaryOp(I, ISD::UDIV); in selectOperator()
1883 } else if (Opcode == ISD::UDIV && isPowerOf2_64(Imm)) { in fastEmit_ri_()
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| H A D | LegalizeDAG.cpp | 3244 case ISD::UDIV: in ExpandNode()
4308 case ISD::UDIV: in ConvertNodeToLibcall()
4479 case ISD::UDIV: in PromoteNode()
4499 case ISD::UDIV: in PromoteNode()
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| H A D | LegalizeVectorOps.cpp | 369 case ISD::UDIV: in LegalizeOp()
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| H A D | SelectionDAG.cpp | 3045 case ISD::UDIV: { in computeKnownBits()
5121 case ISD::UDIV: in FoldValue()
5176 case ISD::UDIV: in isUndef()
5626 case ISD::UDIV: in getNode()
5962 case ISD::UDIV: in getNode()
5984 case ISD::UDIV: in getNode()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 132 setOperationAction(ISD::UDIV, MVT::i8, Promote); in MSP430TargetLowering()
138 setOperationAction(ISD::UDIV, MVT::i16, LibCall); in MSP430TargetLowering()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 937 case ISD::UDIV: in canOpTrap()
1787 case UDiv: return ISD::UDIV; in InstructionOpcodeToISD()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 145 setOperationAction(ISD::UDIV, MVT::i8, Expand); in AVRTargetLowering()
146 setOperationAction(ISD::UDIV, MVT::i16, Expand); in AVRTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 209 setOperationAction(ISD::UDIV, XLenVT, Expand); in RISCVTargetLowering()
218 setOperationAction(ISD::UDIV, MVT::i8, Custom); in RISCVTargetLowering()
221 setOperationAction(ISD::UDIV, MVT::i16, Custom); in RISCVTargetLowering()
224 setOperationAction(ISD::UDIV, MVT::i32, Custom); in RISCVTargetLowering()
735 setOperationAction(ISD::UDIV, VT, Custom); in RISCVTargetLowering()
2569 case ISD::UDIV: in LowerOperation()
4827 case ISD::UDIV: in getRISCVWOpcode()
5012 case ISD::UDIV: in ReplaceNodeResults()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1173 setOperationAction(ISD::UDIV, VT, Custom); in AArch64TargetLowering()
1354 setOperationAction(ISD::UDIV, MVT::v8i8, Custom); in AArch64TargetLowering()
1355 setOperationAction(ISD::UDIV, MVT::v16i8, Custom); in AArch64TargetLowering()
1356 setOperationAction(ISD::UDIV, MVT::v4i16, Custom); in AArch64TargetLowering()
1357 setOperationAction(ISD::UDIV, MVT::v8i16, Custom); in AArch64TargetLowering()
1358 setOperationAction(ISD::UDIV, MVT::v2i32, Custom); in AArch64TargetLowering()
1359 setOperationAction(ISD::UDIV, MVT::v4i32, Custom); in AArch64TargetLowering()
1360 setOperationAction(ISD::UDIV, MVT::v1i64, Custom); in AArch64TargetLowering()
1448 setOperationAction(ISD::UDIV, VT, Expand); in addTypeForNEON()
1577 setOperationAction(ISD::UDIV, VT, Custom); in addTypeForFixedLengthSVE()
[all …]
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