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Searched refs:TSFlags (Results 1 – 25 of 103) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h345 return get(Opcode).TSFlags & SIInstrFlags::SALU; in isSALU()
353 return get(Opcode).TSFlags & SIInstrFlags::VALU; in isVALU()
369 return get(Opcode).TSFlags & SIInstrFlags::SOP1; in isSOP1()
479 return MI.getDesc().TSFlags & SIInstrFlags::DS; in isDS()
483 return get(Opcode).TSFlags & SIInstrFlags::DS; in isDS()
511 auto Flags = MI.getDesc().TSFlags; in isSegmentSpecificFLAT()
516 auto Flags = get(Opcode).TSFlags; in isSegmentSpecificFLAT()
546 return get(Opcode).TSFlags & SIInstrFlags::EXP; in isEXP()
580 return get(Opcode).TSFlags & SIInstrFlags::WQM; in isWQM()
612 return get(Opcode).TSFlags & SIInstrFlags::DPP; in isDPP()
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H A DSIInstrFormats.td145 let TSFlags{0} = SALU;
146 let TSFlags{1} = VALU;
148 let TSFlags{2} = SOP1;
149 let TSFlags{3} = SOP2;
150 let TSFlags{4} = SOPC;
151 let TSFlags{5} = SOPK;
152 let TSFlags{6} = SOPP;
154 let TSFlags{7} = VOP1;
155 let TSFlags{8} = VOP2;
156 let TSFlags{9} = VOPC;
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H A DR600InstrFormats.td53 let TSFlags{4} = Trig;
54 let TSFlags{5} = Op3;
58 let TSFlags{6} = isVector;
61 let TSFlags{10} = Op1;
62 let TSFlags{11} = Op2;
63 let TSFlags{12} = VTXInst;
64 let TSFlags{13} = TEXInst;
65 let TSFlags{14} = ALUInst;
66 let TSFlags{15} = LDS_1A;
67 let TSFlags{16} = LDS_1A1D;
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H A DSIPostRABundler.cpp107 const uint64_t IMemFlags = MI.getDesc().TSFlags & MemFlags; in isBundleCandidate()
113 const uint64_t IMemFlags = MI.getDesc().TSFlags & MemFlags; in canBundle()
117 ((NextMI.getDesc().TSFlags & MemFlags) == IMemFlags) && in canBundle()
H A DR600Defines.h59 #define IS_VTX(desc) ((desc).TSFlags & R600_InstFlag::VTX_INST)
60 #define IS_TEX(desc) ((desc).TSFlags & R600_InstFlag::TEX_INST)
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrFormats.td73 let TSFlags{6-0} = Type.Value;
77 let TSFlags{7} = isSolo;
80 let TSFlags{8} = isSoloAX;
87 let TSFlags{10} = isPredicated;
126 let TSFlags{36} = cofMax1;
128 let TSFlags{37} = cofRelax1;
130 let TSFlags{38} = cofRelax2;
167 let TSFlags{62} = CVINew;
170 let TSFlags{63} = isCVI;
293 let TSFlags{6-0} = Type.Value;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h102 static inline unsigned getFormat(uint64_t TSFlags) { in getFormat() argument
111 static inline VLMUL getLMul(uint64_t TSFlags) { in getLMul() argument
115 static inline bool hasDummyMaskOp(uint64_t TSFlags) { in hasDummyMaskOp() argument
116 return TSFlags & HasDummyMaskOpMask; in hasDummyMaskOp()
120 return TSFlags & ForceTailAgnosticMask; in doesForceTailAgnostic()
123 static inline bool hasMergeOp(uint64_t TSFlags) { in hasMergeOp() argument
124 return TSFlags & HasMergeOpMask; in hasMergeOp()
127 static inline bool hasSEWOp(uint64_t TSFlags) { in hasSEWOp() argument
128 return TSFlags & HasSEWOpMask; in hasSEWOp()
131 static inline bool hasVLOp(uint64_t TSFlags) { in hasVLOp() argument
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp657 uint64_t TSFlags = MCII.get(MI.getOpcode()).TSFlags; in emitPrefixImpl() local
760 uint64_t TSFlags = Desc.TSFlags; in emitVEXOpcodePrefix() local
1211 uint64_t TSFlags = Desc.TSFlags; in emitREXPrefix() local
1213 if (TSFlags & X86II::REX_W) in emitREXPrefix()
1337 uint64_t TSFlags = Desc.TSFlags; in emitOpcodePrefix() local
1397 uint64_t TSFlags = Desc.TSFlags; in emitPrefix() local
1413 uint64_t TSFlags = Desc.TSFlags; in encodeInstruction() local
1478 X86II::getSizeOfImm(TSFlags), getImmFixupKind(TSFlags), in encodeInstruction()
1485 X86II::getSizeOfImm(TSFlags), getImmFixupKind(TSFlags), in encodeInstruction()
1493 X86II::getSizeOfImm(TSFlags), getImmFixupKind(TSFlags), in encodeInstruction()
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H A DX86ATTInstPrinter.cpp163 if (Desc.TSFlags & X86II::EVEX_B) { in printVecCompareInstr()
166 if (Desc.TSFlags & X86II::VEX_W) in printVecCompareInstr()
173 if (Desc.TSFlags & X86II::EVEX_L2) in printVecCompareInstr()
175 else if (Desc.TSFlags & X86II::VEX_L) in printVecCompareInstr()
187 else if (Desc.TSFlags & X86II::VEX_L) in printVecCompareInstr()
193 if (Desc.TSFlags & X86II::EVEX_B) in printVecCompareInstr()
305 if (Desc.TSFlags & X86II::EVEX_B) { in printVecCompareInstr()
308 if (Desc.TSFlags & X86II::VEX_W) in printVecCompareInstr()
315 if (Desc.TSFlags & X86II::EVEX_L2) in printVecCompareInstr()
317 else if (Desc.TSFlags & X86II::VEX_L) in printVecCompareInstr()
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H A DX86IntelInstPrinter.cpp142 if (Desc.TSFlags & X86II::EVEX_K) { in printVecCompareInstr()
153 if (Desc.TSFlags & X86II::EVEX_B) { in printVecCompareInstr()
156 if (Desc.TSFlags & X86II::VEX_W) in printVecCompareInstr()
163 if (Desc.TSFlags & X86II::EVEX_L2) in printVecCompareInstr()
165 else if (Desc.TSFlags & X86II::VEX_L) in printVecCompareInstr()
184 if (Desc.TSFlags & X86II::EVEX_B) in printVecCompareInstr()
282 if (Desc.TSFlags & X86II::EVEX_K) { in printVecCompareInstr()
293 if (Desc.TSFlags & X86II::EVEX_B) { in printVecCompareInstr()
296 if (Desc.TSFlags & X86II::VEX_W) in printVecCompareInstr()
303 if (Desc.TSFlags & X86II::EVEX_L2) in printVecCompareInstr()
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H A DX86BaseInfo.h965 inline bool isPrefix(uint64_t TSFlags) { in isPrefix() argument
970 inline bool isPseudo(uint64_t TSFlags) { in isPseudo() argument
977 return TSFlags >> X86II::OpcodeShift; in getBaseOpcodeFor()
980 inline bool hasImm(uint64_t TSFlags) { in hasImm() argument
981 return (TSFlags & X86II::ImmMask) != 0; in hasImm()
987 switch (TSFlags & X86II::ImmMask) { in getSizeOfImm()
1004 switch (TSFlags & X86II::ImmMask) { in isImmPCRel()
1023 switch (TSFlags & X86II::ImmMask) { in isImmSigned()
1090 switch (TSFlags & X86II::FormMask) { in getMemoryOperandNo()
1217 return (TSFlags & X86II::EVEX_K) != 0; in isKMasked()
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H A DX86InstPrinterCommon.cpp336 uint64_t TSFlags = Desc.TSFlags; in printInstFlags() local
339 if ((TSFlags & X86II::LOCK) || (Flags & X86::IP_HAS_LOCK)) in printInstFlags()
342 if ((TSFlags & X86II::NOTRACK) || (Flags & X86::IP_HAS_NOTRACK)) in printInstFlags()
351 if ((Flags & X86::IP_USE_VEX) || (TSFlags & X86II::ExplicitVEXPrefix)) in printInstFlags()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrFormats.td49 let TSFlags{3...0} = VecInstType;
50 let TSFlags{4...4} = IsSimpleMove;
51 let TSFlags{5...5} = IsLoad;
52 let TSFlags{6...6} = IsStore;
53 let TSFlags{7} = IsTex;
54 let TSFlags{9...8} = IsSuld;
55 let TSFlags{10} = IsSust;
56 let TSFlags{11} = IsSurfTexQuery;
57 let TSFlags{12} = IsTexModeUnified;
H A DNVPTXReplaceImageHandles.cpp83 if (MCID.TSFlags & NVPTXII::IsTexFlag) { in processInstr()
89 if (!(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) { in processInstr()
95 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) { in processInstr()
97 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1); in processInstr()
105 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) { in processInstr()
112 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) { in processInstr()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp236 uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getMemAccessSize()
243 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getAddrMode()
311 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtendableOp()
329 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtentAlignment()
335 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getExtentBits()
341 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in isExtentSigned()
374 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getNewValueOp()
399 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in getNewValueOp2()
418 const uint64_t F = MCII.get(MCI.getOpcode()).TSFlags; in getType()
508 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; in hasNewValue()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFMA3Info.cpp129 const X86InstrFMA3Group *llvm::getFMA3Group(unsigned Opcode, uint64_t TSFlags) { in getFMA3Group() argument
132 uint8_t BaseOpcode = X86II::getBaseOpcodeFor(TSFlags); in getFMA3Group()
133 bool IsFMA3 = ((TSFlags & X86II::EncodingMask) == X86II::VEX || in getFMA3Group()
134 (TSFlags & X86II::EncodingMask) == X86II::EVEX) && in getFMA3Group()
135 (TSFlags & X86II::OpMapMask) == X86II::T8 && in getFMA3Group()
136 (TSFlags & X86II::OpPrefixMask) == X86II::PD && in getFMA3Group()
146 if (TSFlags & X86II::EVEX_RC) in getFMA3Group()
148 else if (TSFlags & X86II::EVEX_B) in getFMA3Group()
H A DX86EvexToVex.cpp225 if ((Desc.TSFlags & X86II::EncodingMask) != X86II::EVEX) in CompressEvexToVexImpl()
231 if (Desc.TSFlags & (X86II::EVEX_K | X86II::EVEX_B)) in CompressEvexToVexImpl()
236 if (Desc.TSFlags & X86II::EVEX_L2) in CompressEvexToVexImpl()
253 (Desc.TSFlags & X86II::VEX_L) ? makeArrayRef(X86EvexToVex256CompressTable) in CompressEvexToVexImpl()
H A DX86InstrFormats.td358 let TSFlags{6-0} = FormBits;
363 let TSFlags{15-13} = OpMapBits;
370 let TSFlags{29-28} = OpEncBits;
371 let TSFlags{37-30} = Opcode;
373 let TSFlags{38} = HasVEX_W;
374 let TSFlags{39} = hasVEX_4V;
375 let TSFlags{40} = hasVEX_L;
376 let TSFlags{41} = hasEVEX_K;
377 let TSFlags{42} = hasEVEX_Z;
379 let TSFlags{44} = hasEVEX_B;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMHazardRecognizer.cpp30 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
51 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
61 (LastMCID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) { in getHazardType()
110 uint64_t TSFlags = MI.getDesc().TSFlags; in getBaseOffset() local
111 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); in getBaseOffset()
113 (TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift; in getBaseOffset()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp361 static VSETVLIInfo computeInfoForInstr(const MachineInstr &MI, uint64_t TSFlags, in computeInfoForInstr() argument
366 RISCVII::VLMUL VLMul = RISCVII::getLMul(TSFlags); in computeInfoForInstr()
378 bool ForceTailAgnostic = RISCVII::doesForceTailAgnostic(TSFlags); in computeInfoForInstr()
393 if (RISCVII::hasVLOp(TSFlags)) { in computeInfoForInstr()
519 uint64_t TSFlags = MI.getDesc().TSFlags; in computeVLVTYPEChanges() local
520 if (RISCVII::hasSEWOp(TSFlags)) { in computeVLVTYPEChanges()
523 VSETVLIInfo NewInfo = computeInfoForInstr(MI, TSFlags, MRI); in computeVLVTYPEChanges()
651 uint64_t TSFlags = MI.getDesc().TSFlags; in emitVSETVLIs() local
652 if (RISCVII::hasSEWOp(TSFlags)) { in emitVSETVLIs()
653 VSETVLIInfo NewInfo = computeInfoForInstr(MI, TSFlags, MRI); in emitVSETVLIs()
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H A DRISCVMCInstLower.cpp150 uint64_t TSFlags = MI->getDesc().TSFlags; in lowerRISCVVMachineInstrToMCInst() local
158 if (RISCVII::hasVLOp(TSFlags) && OpNo == (NumOps - 2)) in lowerRISCVVMachineInstrToMCInst()
160 if (RISCVII::hasSEWOp(TSFlags) && OpNo == (NumOps - 1)) in lowerRISCVVMachineInstrToMCInst()
164 if (RISCVII::hasMergeOp(TSFlags) && OpNo == 1) { in lowerRISCVVMachineInstrToMCInst()
201 if (RISCVII::hasDummyMaskOp(TSFlags)) in lowerRISCVVMachineInstrToMCInst()
H A DRISCVInstrFormats.td158 let TSFlags{4-0} = format.Value;
162 let TSFlags{7-5} = RVVConstraint.Value;
165 let TSFlags{10-8} = VLMul;
168 let TSFlags{11} = HasDummyMask;
171 let TSFlags{12} = ForceTailAgnostic;
174 let TSFlags{13} = HasMergeOp;
177 let TSFlags{14} = HasSEWOp;
180 let TSFlags{15} = HasVLOp;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.cpp287 uint64_t TSFlags = MCID.TSFlags; in GetInstrType() local
289 isFirst = TSFlags & PPCII::PPC970_First; in GetInstrType()
290 isSingle = TSFlags & PPCII::PPC970_Single; in GetInstrType()
291 isCracked = TSFlags & PPCII::PPC970_Cracked; in GetInstrType()
292 return (PPCII::PPC970_Unit)(TSFlags & PPCII::PPC970_Mask); in GetInstrType()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DR600MCCodeEmitter.cpp142 ((Desc.TSFlags & R600_InstFlag::OP1) || in encodeInstruction()
143 Desc.TSFlags & R600_InstFlag::OP2)) { in encodeInstruction()
169 if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags)) in getMachineOpValue()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DLVLGen.cpp44 if (HAS_VLINDEX(MCID.TSFlags)) in getVLIndex()
45 return GET_VLINDEX(MCID.TSFlags); in getVLIndex()

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