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Searched refs:ShiftVT (Results 1 – 8 of 8) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp1591 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local
1595 ShiftVT = MagVT; in ExpandFCOPYSIGN()
1598 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1599 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1601 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1602 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
2386 EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout()); in ExpandLegalINT_TO_FP() local
2387 SDValue ShiftConst = DAG.getConstant(1, dl, ShiftVT); in ExpandLegalINT_TO_FP()
H A DLegalizeIntegerTypes.cpp445 EVT ShiftVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout()); in getShiftAmountTyForConstant() local
448 if (!ShiftVT.isVector() && in getShiftAmountTyForConstant()
449 ShiftVT.getSizeInBits() < Log2_32_Ceil(VT.getSizeInBits())) in getShiftAmountTyForConstant()
450 ShiftVT = MVT::i32; in getShiftAmountTyForConstant()
451 return ShiftVT; in getShiftAmountTyForConstant()
477 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BSWAP() local
479 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BSWAP()
499 EVT ShiftVT = getShiftAmountTyForConstant(NVT, TLI, DAG); in PromoteIntRes_BITREVERSE() local
502 DAG.getConstant(DiffBits, dl, ShiftVT)); in PromoteIntRes_BITREVERSE()
H A DDAGCombiner.cpp3834 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local
4344 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitUDIVLike() local
4547 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMULHU() local
4548 SDValue Trunc = DAG.getZExtOrTrunc(SRLAmt, DL, ShiftVT); in visitMULHU()
6699 EVT ShiftVT = OppShift.getOperand(1).getValueType(); in extractShiftForRotate() local
8197 EVT ShiftVT = C1->getValueType(0); in visitRotate() local
8220 EVT ShiftVT = N1.getValueType(); in visitSHL() local
8339 Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, Sum, N1); in visitSHL()
8601 EVT ShiftVT = N1.getValueType(); in visitSRA() local
8602 EVT ShiftSVT = ShiftVT.getScalarType(); in visitSRA()
[all …]
H A DTargetLowering.cpp1435 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1458 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1500 TLO.DAG.getConstant(ShAmt - InnerShAmt, dl, ShiftVT); in SimplifyDemandedBits()
1543 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1566 SDValue NewSA = TLO.DAG.getConstant(Diff, dl, ShiftVT); in SimplifyDemandedBits()
1595 EVT ShiftVT = Op1.getValueType(); in SimplifyDemandedBits() local
1649 SDValue NewSA = TLO.DAG.getConstant(BitWidth - 1 - Log2, dl, ShiftVT); in SimplifyDemandedBits()
3428 EVT ShiftVT = getShiftAmountTy(OpVT, DAG.getDataLayout(), in foldSetCCWithBinOp() local
3430 SDValue One = DAG.getConstant(1, DL, ShiftVT); in foldSetCCWithBinOp()
6882 EVT ShiftVT = getShiftAmountTy(SrcVT, DAG.getDataLayout()); in expandUINT_TO_FP() local
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H A DSelectionDAG.cpp1479 EVT ShiftVT = TLI->getShiftAmountTy(VT, getDataLayout(), LegalTypes); in getShiftAmountConstant() local
1480 return getConstant(Val, DL, ShiftVT); in getShiftAmountConstant()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp5956 EVT ShiftVT = N0.getOperand(1).getValueType(); in combineSIGN_EXTEND() local
5961 ShiftVT)); in combineSIGN_EXTEND()
5963 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in combineSIGN_EXTEND()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp10807 MVT ShiftVT = ResVT; in LowerCONCAT_VECTORSvXi1() local
10809 ShiftVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in LowerCONCAT_VECTORSvXi1()
10813 SubVec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ShiftVT, in LowerCONCAT_VECTORSvXi1()
10814 DAG.getUNDEF(ShiftVT), SubVec, in LowerCONCAT_VECTORSvXi1()
10816 Op = DAG.getNode(X86ISD::KSHIFTL, dl, ShiftVT, SubVec, in LowerCONCAT_VECTORSvXi1()
12877 static int matchShuffleAsShift(MVT &ShiftVT, unsigned &Opcode, in matchShuffleAsShift() argument
12947 MVT ShiftVT; in lowerShuffleAsShift() local
12965 assert(DAG.getTargetLoweringInfo().isTypeLegal(ShiftVT) && in lowerShuffleAsShift()
12967 V = DAG.getBitcast(ShiftVT, V); in lowerShuffleAsShift()
12968 V = DAG.getNode(Opcode, DL, ShiftVT, V, in lowerShuffleAsShift()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp6489 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local
6491 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()