Searched refs:ShiftRight (Results 1 – 5 of 5) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldChecker.cpp | 95 ShiftRight enumerator
162 return std::make_pair(BinOpToken::ShiftRight, Expr.substr(2).ltrim()); in parseBinOpToken()
201 case BinOpToken::ShiftRight: in computeBinOpResult()
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| /freebsd-13.1/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | Interp.h | 862 inline bool ShiftRight(InterpState &S, CodePtr OpPC, const T &V, unsigned RHS) { in ShiftRight() function
907 return ShiftRight<TL, TR>(S, OpPC, LHS, Trunc<TR, TL>(S, OpPC, Bits, RHS)); in Shr()
920 return ShiftRight<TL, TR>(S, OpPC, LHS, Trunc<TR, TL>(S, OpPC, Bits, -RHS)); in Shl()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1601 SDValue ShiftRight = Op.getOperand(0); in LowerTruncateToBT() local
1602 return getBitTestCondition(ShiftRight.getOperand(0), ShiftRight.getOperand(1), in LowerTruncateToBT()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6219 unsigned ShiftRight = NumElems - SubVecNumElems - IdxVal; in insert1BitVector() local
6222 if (ShiftRight != 0) in insert1BitVector()
6224 DAG.getTargetConstant(ShiftRight, dl, MVT::i8)); in insert1BitVector()
6260 unsigned ShiftRight = NumElems - SubVecNumElems - IdxVal; in insert1BitVector() local
6272 DAG.getTargetConstant(ShiftRight, dl, MVT::i8)); in insert1BitVector()
6283 DAG.getTargetConstant(ShiftRight, dl, MVT::i8)); in insert1BitVector()
44900 if (SDValue ShiftRight = combineAndMaskToShift(N, DAG, Subtarget)) in combineAnd() local
44901 return ShiftRight; in combineAnd()
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| /freebsd-13.1/sys/contrib/dev/acpica/ |
| H A D | changes.txt | 3614 ShiftRight. The actual problem cases seem to be rather unusual in common
3916 Z = X >> Y ShiftRight (X, Y, Z)
3945 X >>= Y ShiftRight (X, Y, X)
11573 Fixed a problem where a ShiftLeft or ShiftRight of more than 64 bits
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