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Searched refs:ShiftL (Results 1 – 4 of 4) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Support/
H A DScaledNumber.h307 int32_t ShiftL = std::min<int32_t>(countLeadingZeros(LDigits), ScaleDiff); in matchScales() local
308 assert(ShiftL < getWidth<DigitsT>() && "can't shift more than width"); in matchScales()
310 int32_t ShiftR = ScaleDiff - ShiftL; in matchScales()
317 LDigits <<= ShiftL; in matchScales()
320 LScale -= ShiftL; in matchScales()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp3541 SDValue ShiftL = in get64BitZExtCompare() local
3552 ShiftR, ShiftL, SubtractCarry), 0); in get64BitZExtCompare()
3703 SDValue ShiftL = in get64BitSExtCompare() local
3712 ShiftR, ShiftL, SubtractCarry), 0); in get64BitSExtCompare()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp1897 auto ShiftL = MIRBuilder.buildShl(WideTy, LHS, ShiftK); in widenScalarAddSubShlSat() local
1901 {ShiftL, ShiftR}, MI.getFlags()); in widenScalarAddSubShlSat()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp18716 SDValue ShiftL = Op; in SimplifyDemandedBitsForTargetNode() local
18721 if (!ShiftL.hasOneUse() || !ShiftR.hasOneUse()) in SimplifyDemandedBitsForTargetNode()
18724 unsigned ShiftLBits = ShiftL->getConstantOperandVal(1); in SimplifyDemandedBitsForTargetNode()