| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 243 .addReg(ScratchReg) in doAtomicBinOpExpansion() 249 .addReg(ScratchReg); in doAtomicBinOpExpansion() 251 .addReg(ScratchReg) in doAtomicBinOpExpansion() 271 .addReg(ScratchReg) in insertMaskedMerge() 275 .addReg(ScratchReg); in insertMaskedMerge() 324 .addReg(ScratchReg) in doMaskedAtomicBinOpExpansion() 329 insertMaskedMerge(TII, DL, LoopMBB, ScratchReg, DestReg, ScratchReg, MaskReg, in doMaskedAtomicBinOpExpansion() 334 .addReg(ScratchReg); in doMaskedAtomicBinOpExpansion() 336 .addReg(ScratchReg) in doMaskedAtomicBinOpExpansion() 560 .addReg(ScratchReg) in expandAtomicCmpXchg() [all …]
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| H A D | RISCVRegisterInfo.cpp | 207 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local 208 TII->movImm(MBB, II, DL, ScratchReg, Offset.getFixed()); in eliminateFrameIndex() 212 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex() 216 BuildMI(MBB, II, DL, TII->get(RISCV::ADD), ScratchReg) in eliminateFrameIndex() 218 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex() 220 FrameReg = ScratchReg; in eliminateFrameIndex() 232 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in eliminateFrameIndex() local 233 BuildMI(MBB, II, DL, TII->get(RISCV::ADDI), ScratchReg) in eliminateFrameIndex() 237 .ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex()
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| H A D | RISCVFrameLowering.cpp | 280 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in adjustReg() local 281 TII->movImm(MBB, MBBI, DL, ScratchReg, Val, Flag); in adjustReg() 284 .addReg(ScratchReg, RegState::Kill) in adjustReg()
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| H A D | RISCVInstrInfo.cpp | 664 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in insertIndirectBranch() local 668 .addReg(ScratchReg, RegState::Define | RegState::Dead) in insertIndirectBranch() 674 MRI.replaceRegWith(ScratchReg, Scav); in insertIndirectBranch()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 653 Register ScratchReg; in emitPrologue() local 913 .addReg(ScratchReg) in emitPrologue() 1407 .addReg(ScratchReg) in inlineStackProbe() 1422 ScratchReg) in inlineStackProbe() 1423 .addReg(ScratchReg) in inlineStackProbe() 1427 .addReg(ScratchReg) in inlineStackProbe() 1459 .addReg(ScratchReg) in inlineStackProbe() 1464 .addReg(ScratchReg) in inlineStackProbe() 1573 Register ScratchReg; in emitEpilogue() local 1847 .addReg(ScratchReg) in emitEpilogue() [all …]
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| H A D | PPCAsmPrinter.cpp | 461 .addReg(ScratchReg) in LowerPATCHPOINT() 465 .addReg(ScratchReg) in LowerPATCHPOINT() 466 .addReg(ScratchReg) in LowerPATCHPOINT() 470 .addReg(ScratchReg) in LowerPATCHPOINT() 471 .addReg(ScratchReg) in LowerPATCHPOINT() 475 .addReg(ScratchReg) in LowerPATCHPOINT() 476 .addReg(ScratchReg) in LowerPATCHPOINT() 496 .addReg(ScratchReg)); in LowerPATCHPOINT() 499 .addReg(ScratchReg) in LowerPATCHPOINT() 501 .addReg(ScratchReg)); in LowerPATCHPOINT() [all …]
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| H A D | PPCISelLowering.cpp | 11770 Register ScratchReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca() local 11776 ScratchReg) in emitProbedAlloca() 11780 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::LI8 : PPC::LI), ScratchReg) in emitProbedAlloca() 11788 .addReg(ScratchReg); in emitProbedAlloca() 11792 .addReg(ScratchReg); in emitProbedAlloca() 11823 .addReg(ScratchReg); in emitProbedAlloca()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFInstrInfo.cpp | 50 Register ScratchReg = MI->getOperand(4).getReg(); in expandMEMCPY() local 79 .addReg(ScratchReg, RegState::Define).addReg(SrcReg) in expandMEMCPY() 82 .addReg(ScratchReg, RegState::Kill).addReg(DstReg) in expandMEMCPY() 93 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY() 95 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY() 100 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY() 102 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY() 107 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY() 109 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
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| H A D | BPFISelLowering.cpp | 691 unsigned ScratchReg; in EmitInstrWithCustomInserterMemcpy() local 708 ScratchReg = MRI.createVirtualRegister(&BPF::GPRRegClass); in EmitInstrWithCustomInserterMemcpy() 709 MIB.addReg(ScratchReg, in EmitInstrWithCustomInserterMemcpy()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 341 Register ScratchReg = in eliminateFrameIndex() local 349 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex() 351 MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg, in eliminateFrameIndex() 357 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg) in eliminateFrameIndex() 362 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex() 363 BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg) in eliminateFrameIndex() 364 .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg); in eliminateFrameIndex() 368 MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg, in eliminateFrameIndex()
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| H A D | SystemZAsmPrinter.cpp | 683 unsigned ScratchReg = 0; in LowerPATCHPOINT() local 686 ScratchReg = MI.getOperand(ScratchIdx).getReg(); in LowerPATCHPOINT() 687 } while (ScratchReg == SystemZ::R0D); in LowerPATCHPOINT() 691 .addReg(ScratchReg) in LowerPATCHPOINT() 696 .addReg(ScratchReg) in LowerPATCHPOINT() 703 .addReg(ScratchReg)); in LowerPATCHPOINT()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FalkorHWPFFix.cpp | 751 for (unsigned ScratchReg : AArch64::GPR64RegClass) { in runOnLoop() local 752 if (!LR.available(ScratchReg) || MRI.isReserved(ScratchReg)) in runOnLoop() 756 NewLdI.BaseReg = ScratchReg; in runOnLoop() 763 << printReg(ScratchReg, TRI) << '\n'); in runOnLoop() 771 BuildMI(*MBB, &MI, DL, TII->get(AArch64::ORRXrs), ScratchReg) in runOnLoop() 776 BaseOpnd.setReg(ScratchReg); in runOnLoop() 782 << printReg(ScratchReg, TRI) << '\n'); in runOnLoop() 784 ScratchReg); // Change tied operand pre/post update dest. in runOnLoop() 788 .addReg(ScratchReg) in runOnLoop()
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| H A D | AArch64RegisterInfo.cpp | 694 Register ScratchReg = in eliminateFrameIndex() local 696 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, in eliminateFrameIndex() 698 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(AArch64::LDG), ScratchReg) in eliminateFrameIndex() 699 .addReg(ScratchReg) in eliminateFrameIndex() 700 .addReg(ScratchReg) in eliminateFrameIndex() 703 .ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex() 724 Register ScratchReg = createScratchRegisterForInstruction(MI, TII); in eliminateFrameIndex() local 725 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII); in eliminateFrameIndex() 726 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false, true); in eliminateFrameIndex()
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| H A D | AArch64AsmPrinter.cpp | 891 Register ScratchReg = MI.getOperand(1).getReg(); in LowerJumpTableDest() local 893 STI->getRegisterInfo()->getSubReg(ScratchReg, AArch64::sub_32); in LowerJumpTableDest() 928 .addReg(Size == 4 ? ScratchReg : ScratchRegW) in LowerJumpTableDest() 939 .addReg(ScratchReg) in LowerJumpTableDest() 989 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); in LowerPATCHPOINT() local 993 .addReg(ScratchReg) in LowerPATCHPOINT() 997 .addReg(ScratchReg) in LowerPATCHPOINT() 998 .addReg(ScratchReg) in LowerPATCHPOINT() 1002 .addReg(ScratchReg) in LowerPATCHPOINT() 1003 .addReg(ScratchReg) in LowerPATCHPOINT() [all …]
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| H A D | AArch64FrameLowering.cpp | 3178 Register ScratchReg = MRI->createVirtualRegister(&AArch64::GPR64RegClass); in emitUnrolled() local 3179 emitFrameOffset(*MBB, InsertI, DL, ScratchReg, BaseReg, in emitUnrolled() 3181 BaseReg = ScratchReg; in emitUnrolled()
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| H A D | AArch64FastISel.cpp | 4995 const unsigned ScratchReg = createResultReg(&AArch64::GPR32RegClass); in selectAtomicCmpXchg() local 5000 .addDef(ScratchReg) in selectAtomicCmpXchg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 831 unsigned ScratchReg = 0; in eliminateFrameIndex() local 846 ScratchReg = MF.getRegInfo().createVirtualRegister(RegClass); in eliminateFrameIndex() 848 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex() 852 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex() 856 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false,true); in eliminateFrameIndex()
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| H A D | Thumb1FrameLowering.cpp | 71 unsigned ScratchReg, unsigned MIFlags) { in emitPrologueEpilogueSPUpdate() argument 79 if (ScratchReg == ARM::NoRegister) in emitPrologueEpilogueSPUpdate() 84 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ScratchReg) in emitPrologueEpilogueSPUpdate() 87 MRI.emitLoadConstPool(MBB, MBBI, dl, ScratchReg, 0, NumBytes, ARMCC::AL, in emitPrologueEpilogueSPUpdate() 92 .addReg(ScratchReg, RegState::Kill) in emitPrologueEpilogueSPUpdate()
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| H A D | ARMAsmPrinter.cpp | 2021 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction() local 2031 .addReg(ScratchReg) in emitInstruction() 2068 .addReg(ScratchReg) in emitInstruction() 2081 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction() local 2084 .addReg(ScratchReg) in emitInstruction() 2095 .addReg(ScratchReg) in emitInstruction() 2101 .addReg(ScratchReg) in emitInstruction() 2137 .addReg(ScratchReg) in emitInstruction()
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| H A D | ARMExpandPseudoInsts.cpp | 2133 unsigned ScratchReg = ClearRegs.front(); in ExpandMI() local 2146 BuildMI(MBB, MBBI, DL, TII->get(ARM::tMOVi8), ScratchReg) in ExpandMI() 2153 .addReg(ScratchReg) in ExpandMI()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 2758 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true); in adjustForSegmentedStacks() local 2759 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForSegmentedStacks() 2835 ScratchReg = IsLP64 ? X86::RSP : X86::ESP; in adjustForSegmentedStacks() 2862 ScratchReg = X86::ESP; in adjustForSegmentedStacks() 2869 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks() 2900 .addReg(ScratchReg) in adjustForSegmentedStacks() 3127 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local 3144 ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true); in adjustForHiPEPrologue() 3145 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForHiPEPrologue() 3153 .addReg(ScratchReg), PReg, false, SPLimitOffset); in adjustForHiPEPrologue() [all …]
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| H A D | X86MCInstLower.cpp | 1429 Register ScratchReg = MI.getOperand(ScratchIdx).getReg(); in LowerPATCHPOINT() local 1430 if (X86II::isX86_64ExtendedReg(ScratchReg)) in LowerPATCHPOINT() 1436 MCInstBuilder(X86::MOV64ri).addReg(ScratchReg).addOperand(CalleeMCOp)); in LowerPATCHPOINT() 1441 EmitAndCountInstruction(MCInstBuilder(X86::CALL64r).addReg(ScratchReg)); in LowerPATCHPOINT()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3404 Register ScratchReg = MRI.createVirtualRegister(&AArch64::GPR64spRegClass); in selectBrJT() local 3408 {TargetReg, ScratchReg}, {JTAddr, Index}) in selectBrJT()
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