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Searched refs:SLT (Results 1 – 12 of 12) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp587 if (SLT == MVT::i64) in getArithmeticInstrCost()
590 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()
600 if (SLT == MVT::i64) { in getArithmeticInstrCost()
605 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()
611 if (SLT == MVT::i64) { in getArithmeticInstrCost()
648 if (SLT == MVT::f64) in getArithmeticInstrCost()
654 if (SLT == MVT::f32 || SLT == MVT::f16) in getArithmeticInstrCost()
661 if (SLT == MVT::f64) { in getArithmeticInstrCost()
691 if (SLT == MVT::f32 || SLT == MVT::f16) { in getArithmeticInstrCost()
707 return TLI->isFNegFree(SLT) ? 0 : NElts; in getArithmeticInstrCost()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp311 unsigned LL, SC, SLT, SLTu, OR, MOVN, MOVZ, SELNEZ, SELEQZ; in expandAtomicBinOpSubword() local
319 SLT = Mips::SLT_MM; in expandAtomicBinOpSubword()
331 SLT = Mips::SLT; in expandAtomicBinOpSubword()
457 unsigned SLTScratch4 = IsUnsigned ? SLTu : SLT; in expandAtomicBinOpSubword()
586 unsigned LL, SC, ZERO, BEQ, SLT, SLTu, OR, MOVN, MOVZ, SELNEZ, SELEQZ; in expandAtomicBinOp() local
593 SLT = Mips::SLT_MM; in expandAtomicBinOp()
608 SLT = Mips::SLT; in expandAtomicBinOp()
623 SLT = Mips::SLT64; in expandAtomicBinOp()
743 unsigned SLTScratch2 = IsUnsigned ? SLTu : SLT; in expandAtomicBinOp()
H A DMipsCondMov.td199 defm : MovzPats0<GPR32, GPR32, MOVZ_I_I, SLT, SLTu, SLTi, SLTiu>,
204 defm : MovzPats0<GPR32, GPR64, MOVZ_I_I64, SLT, SLTu, SLTi, SLTiu>,
232 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S, SLT, SLTu, SLTi, SLTiu>,
244 defm : MovzPats0<GPR32, AFGR64, MOVZ_I_D32, SLT, SLTu, SLTi, SLTiu>,
251 defm : MovzPats0<GPR32, FGR64, MOVZ_I_D64, SLT, SLTu, SLTi, SLTiu>,
H A DMipsInstructionSelector.cpp787 Instructions.emplace_back(Mips::SLT, ICMPReg, RHS, LHS); in select()
790 Instructions.emplace_back(Mips::SLT, Temp, LHS, RHS); in select()
794 Instructions.emplace_back(Mips::SLT, ICMPReg, LHS, RHS); in select()
797 Instructions.emplace_back(Mips::SLT, Temp, RHS, LHS); in select()
H A DMipsFastISel.cpp682 emitInst(Mips::SLT, ResultReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
685 emitInst(Mips::SLT, ResultReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
689 emitInst(Mips::SLT, TempReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
695 emitInst(Mips::SLT, TempReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
H A DMipsInstrInfo.td2062 def SLT : MMRel, SetCC_R<"slt", setlt, GPR32Opnd>, ADD_FM<0, 0x2a>,
2728 (SLT GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>, ISA_MIPS1;
2731 (SLT GPR32Opnd:$rs, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>, ISA_MIPS1;
3277 defm : BrcondPats<GPR32, BEQ, BEQ, BNE, SLT, SLTu, SLTi, SLTiu, ZERO>,
3331 defm : SetlePats<GPR32, XORi, SLT, SLTu>, ISA_MIPS1;
3332 defm : SetgtPats<GPR32, SLT, SLTu>, ISA_MIPS1;
3333 defm : SetgePats<GPR32, XORi, SLT, SLTu>, ISA_MIPS1;
H A DMipsScheduleP5600.td225 SEB, SEH, SLT, SLTu, SLL, SRA, SRL, XORi,
H A DMips16InstrInfo.td1208 // Format: SLT rx, ry MIPS16e
1820 // x >= k to x > (k - 1) and then use SLT
H A DMipsScheduleGeneric.td50 SLLV, SLT, SLTi, SLTiu, SLTu, SRA, SRAV, SRL,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.td513 def SLT : ALU_rr<0b0000000, 0b010, "slt">, Sched<[WriteIALU, ReadIALU, ReadIALU]>;
697 def : InstAlias<"sltz $rd, $rs", (SLT GPR:$rd, GPR:$rs, X0)>;
698 def : InstAlias<"sgtz $rd, $rs", (SLT GPR:$rd, X0, GPR:$rs)>;
702 def : InstAlias<"sgt $rd, $rs, $rt", (SLT GPR:$rd, GPR:$rt, GPR:$rs), 0>;
947 def : PatGprGpr<setlt, SLT>;
965 def : Pat<(setgt GPR:$rs1, GPR:$rs2), (SLT GPR:$rs2, GPR:$rs1)>;
966 def : Pat<(setge GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;
967 def : Pat<(setle GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;
H A DRISCVInstrInfoB.td907 (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
909 (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp4143 TOut.emitRRR(IsUnsigned ? Mips::SLTu : Mips::SLT, ATRegNum, in expandCondBranches()
4548 OpCode = Mips::SLT; in expandSge()
4583 OpRegCode = Mips::SLT; in expandSgeImm()
4640 OpCode = Mips::SLT; in expandSgtImm()
4685 OpCode = Mips::SLT; in expandSle()
4720 OpRegCode = Mips::SLT; in expandSleImm()
4798 FinalOpcode = Mips::SLT; in expandAliasImmediate()