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Searched refs:SIMD (Results 1 – 25 of 38) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td556 // 4.2.28 Advanced SIMD, Integer, 2 cycle
567 // 4.2.29 Advanced SIMD, Integer, 4 cycle
584 // 4.2.32 Advanced SIMD, Vector Table Lookup
597 // 4.2.33 Advanced SIMD, Transpose
602 // 4.2.34 Advanced SIMD and VFP, Floating Point
612 // 4.2.35 Advanced SIMD and VFP, Multiply
622 // 4.2.36 Advanced SIMD and VFP, Convert
625 // 4.2.37 Advanced SIMD and VFP, Move
652 // 4.2.38 Advanced SIMD and VFP, Move FPSCR
679 // 4.2.41 Advanced SIMD and VFP, Load Multiple
[all …]
H A DARMRegisterInfo.td155 // Advanced SIMD (NEON) defines 16 quad-word aliases
H A DARM.td310 // Cortex-A8 / A9 Advanced SIMD has multiplier accumulator forwarding.
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssembly.td26 "Enable 128-bit SIMD">;
H A DWebAssemblyInstrSIMD.td1 // WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
10 /// WebAssembly SIMD operand code-gen constructs.
425 // Constructing SIMD values
909 // WebAssembly SIMD shifts are nonstandard in that the shift amount is
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ScheduleAtom.td36 // SIMD/FP: SIMD ALU, Shuffle,SIMD/FP multiply, divide
38 // SIMD/FP: SIMD ALU, FP Adder
H A DX86CallingConv.td223 // Boolean vectors of AVX-512 are returned in SIMD registers.
544 // Boolean vectors of AVX-512 are passed in SIMD registers.
837 // Boolean vectors of AVX-512 are passed in SIMD registers.
H A DX86InstrFragmentsSIMD.td1 //===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
9 // This file provides pattern fragments useful for SIMD instructions.
H A DX86RegisterInfo.td310 // SIMD Floating-point control register.
H A DX86Schedule.td548 // Conditional SIMD Packed Loads and Stores wrappers.
H A DX86ScheduleBtVer2.td54 // The Jaguar FP Retire Queue renames SIMD and FP uOps onto a pool of 72 SSE
H A DX86ScheduleZnver2.td110 // The Zen FP Retire Queue renames SIMD and FP uOps onto a pool of 160 128-bit
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsWebAssembly.td104 // SIMD intrinsics
/freebsd-13.1/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsWebAssembly.def68 // SIMD builtins
H A DLangOptions.def234 LANGOPT(OpenMPSimd , 1, 0, "Use SIMD only OpenMP support.")
/freebsd-13.1/sys/contrib/openzfs/config/
H A Dtoolchain-simd.m42 dnl # Checks if host toolchain supports SIMD instructions
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedFalkorDetails.td584 // SIMD Floating-point Instructions
656 // SIMD Integer Instructions
779 // SIMD Load Instructions
907 // SIMD Miscellaneous Instructions
966 // SIMD Store Instructions
H A DAArch64SchedThunderX2T99.td39 // Port 0: ALU, FP/SIMD.
42 // Port 1: ALU, FP/SIMD, integer mul/div.
73 // Crypto FP/SIMD micro-ops only on port 1.
76 // FP/SIMD micro-ops on ports 0 and 1.
H A DAArch64SchedThunderX3T110.td55 // Port 6: FP/Neon/SIMD/Crypto.
58 // Port 7: FP/Neon/SIMD/Crypto.
61 // Port 8: FP/Neon/SIMD/Crypto.
64 // Port 9: FP/Neon/SIMD/Crypto.
H A DAArch64.td26 "Enable Advanced SIMD instructions", [FeatureFPARMv8]>;
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewRegisters.def680 // 128-bit SIMD registers
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCSchedule440.td18 // SIMD floating-point unit for Blue Gene/L.
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLICM.cpp1353 auto *SIMD = MSSA->getMemoryAccess(SI); in canSinkOrHoistInst() local
1366 if (!Flags->getIsSink() && !MSSA->dominates(SIMD, MU)) in canSinkOrHoistInst()
/freebsd-13.1/sys/contrib/openzfs/module/icp/asm-x86_64/modes/
H A Dghash-x86_64.S62 # but not for Bulldozer. Latter is because logical SIMD operations
/freebsd-13.1/share/mk/
H A Dbsd.README143 CFLAGS_NO_SIMD Add this to CFLAGS for programs that don't want any SIMD

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