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Searched refs:SELECT_CC (Results 1 – 25 of 53) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.td356 // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded after
359 def SELECT_CC : PseudoInstXCore<(outs GRRegs:$dst),
361 "# SELECT_CC PSEUDO!",
1202 (SELECT_CC GRRegs:$lhs, GRRegs:$T, GRRegs:$F)>;
1205 (SELECT_CC GRRegs:$lhs, GRRegs:$F, GRRegs:$T)>;
1208 (SELECT_CC (LSS_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1210 (SELECT_CC (LSU_3r GRRegs:$rhs, GRRegs:$lhs), GRRegs:$F, GRRegs:$T)>;
1212 (SELECT_CC (LSS_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1216 (SELECT_CC (EQ_3r GRRegs:$lhs, GRRegs:$rhs), GRRegs:$F, GRRegs:$T)>;
1300 (SELECT_CC (ASHR_l2rus GRRegs:$lhs, 32), GRRegs:$T, GRRegs:$F)>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.h28 SELECT_CC, enumerator
H A DBPFISelLowering.cpp120 setOperationAction(ISD::SELECT_CC, VT, Custom); in BPFTargetLowering()
287 case ISD::SELECT_CC: in LowerOperation()
621 return DAG.getNode(BPFISD::SELECT_CC, DL, VTs, Ops); in LowerSELECT_CC()
632 case BPFISD::SELECT_CC: in getTargetNodeName()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp133 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in R600TargetLowering()
134 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in R600TargetLowering()
252 setTargetDAGCombine(ISD::SELECT_CC); in R600TargetLowering()
461 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
904 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC); in LowerSELECT_CC()
961 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, in LowerSELECT_CC()
987 return DAG.getNode(ISD::SELECT_CC, DL, VT, in LowerSELECT_CC()
1780 if (SelectCC.getOpcode() != ISD::SELECT_CC || in PerformDAGCombine()
1788 return DAG.getNode(ISD::SELECT_CC, DL, N->getValueType(0), in PerformDAGCombine()
1871 case ISD::SELECT_CC: { in PerformDAGCombine()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h38 SELECT_CC, enumerator
H A DLanaiISelLowering.cpp90 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in LanaiTargetLowering()
190 case ISD::SELECT_CC: in LowerOperation()
998 return DAG.getNode(LanaiISD::SELECT_CC, DL, VTs, TrueV, FalseV, TargetCC, in LowerSELECT_CC()
1102 case LanaiISD::SELECT_CC: in getTargetNodeName()
1499 case LanaiISD::SELECT_CC: in computeKnownBitsForTargetNode()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h64 SELECT_CC, enumerator
H A DMSP430ISelLowering.cpp96 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in MSP430TargetLowering()
97 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in MSP430TargetLowering()
349 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); in LowerOperation()
1212 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSETCC()
1230 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSELECT_CC()
1381 case MSP430ISD::SELECT_CC: return "MSP430ISD::SELECT_CC"; in getTargetNodeName()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp103 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom); in AVRTargetLowering()
104 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom); in AVRTargetLowering()
105 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in AVRTargetLowering()
106 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in AVRTargetLowering()
260 NODE(SELECT_CC); in getTargetNodeName()
761 return DAG.getNode(AVRISD::SELECT_CC, dl, VTs, Ops); in LowerSELECT_CC()
778 return DAG.getNode(AVRISD::SELECT_CC, DL, VTs, Ops); in LowerSETCC()
812 case ISD::SELECT_CC: in LowerOperation()
H A DAVRISelLowering.h69 SELECT_CC enumerator
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp132 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break; in SoftenFloatResult()
727 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), in SoftenFloatRes_SELECT_CC()
841 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break; in SoftenFloatOperand()
1184 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; in ExpandFloatResult()
1784 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break; in ExpandFloatOperand()
2093 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break; in PromoteFloatOperand()
2161 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0), in PromoteFloatOp_SELECT_CC()
2271 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break; in PromoteFloatResult()
2495 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), in PromoteFloatRes_SELECT_CC()
2635 case ISD::SELECT_CC: R = SoftPromoteHalfRes_SELECT_CC(N); break; in SoftPromoteHalfResult()
[all …]
H A DLegalizeTypesGeneric.cpp553 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0), in SplitRes_SELECT_CC()
555 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0), in SplitRes_SELECT_CC()
H A DLegalizeDAG.cpp1035 case ISD::SELECT_CC: in LegalizeOp()
1040 unsigned CCOperand = Node->getOpcode() == ISD::SELECT_CC ? 4 : in LegalizeOp()
1052 if (Node->getOpcode() == ISD::SELECT_CC) in LegalizeOp()
3608 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, VT, Tmp1, Tmp2, in ExpandNode()
3616 case ISD::SELECT_CC: { in ExpandNode()
3679 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), in ExpandNode()
3684 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, Node->getValueType(0), Tmp1, in ExpandNode()
4377 Node->getOpcode() == ISD::SELECT_CC) in PromoteNode()
4581 case ISD::SELECT_CC: { in PromoteNode()
4605 Tmp1 = DAG.getNode(ISD::SELECT_CC, dl, NVT, {Tmp1, Tmp2, Tmp3, Tmp4, Cond}, in PromoteNode()
H A DLegalizeVectorOps.cpp399 case ISD::SELECT_CC: in LegalizeOp()
1391 DAG.getNode(ISD::SELECT_CC, dl, VT, LHS, RHS, in ExpandSETCC()
H A DSelectionDAGDumper.cpp285 case ISD::SELECT_CC: return "select_cc"; in getOperationName()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h694 SELECT_CC, enumerator
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp115 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in ARCTargetLowering()
754 case ISD::SELECT_CC: in LowerOperation()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp175 setOperationAction(ISD::SELECT_CC, XLenVT, Expand); in RISCVTargetLowering()
323 setOperationAction(ISD::SELECT_CC, MVT::f16, Expand); in RISCVTargetLowering()
339 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in RISCVTargetLowering()
467 setOperationAction(ISD::SELECT_CC, VT, Expand); in RISCVTargetLowering()
559 setOperationAction(ISD::SELECT_CC, VT, Expand); in RISCVTargetLowering()
619 setOperationAction(ISD::SELECT_CC, VT, Expand); in RISCVTargetLowering()
756 setOperationAction(ISD::SELECT_CC, VT, Expand); in RISCVTargetLowering()
821 setOperationAction(ISD::SELECT_CC, VT, Expand); in RISCVTargetLowering()
6105 case RISCVISD::SELECT_CC: { in PerformDAGCombine()
6529 case RISCVISD::SELECT_CC: { in computeKnownBitsForTargetNode()
[all …]
H A DRISCVISelLowering.h39 SELECT_CC, enumerator
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp463 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in PPCTargetLowering()
464 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in PPCTargetLowering()
787 setOperationAction(ISD::SELECT_CC, VT, Promote); in PPCTargetLowering()
1343 setTargetDAGCombine(ISD::SELECT_CC); in PPCTargetLowering()
13068 N->getOpcode() == ISD::SELECT_CC) { in DAGCombineTruncBoolExt()
13290 case ISD::SELECT_CC: C = 2; break; in DAGCombineTruncBoolExt()
13357 N->getOperand(0).getOpcode() != ISD::SELECT_CC) in DAGCombineExtBoolTrunc()
13523 case ISD::SELECT_CC: C = 2; break; in DAGCombineExtBoolTrunc()
13541 PromOp.getOpcode() == ISD::SELECT_CC) { in DAGCombineExtBoolTrunc()
13572 PromOp.getOpcode() == ISD::SELECT_CC) { in DAGCombineExtBoolTrunc()
[all …]
H A DPPCISelDAGToDAG.cpp3832 Compare.getOpcode() == ISD::SELECT_CC) && in getSETCCInGPR()
3844 int CCOpNum = Compare.getOpcode() == ISD::SELECT_CC ? 4 : 2; in getSETCCInGPR()
4495 assert(N->getOpcode() == ISD::SELECT_CC && "Expecting a SELECT_CC here."); in mayUseP9Setb()
4516 (FalseRes.getOpcode() != ISD::SELECT_CC || CC != ISD::SETEQ))) in mayUseP9Setb()
4519 SDValue SetOrSelCC = FalseRes.getOpcode() == ISD::SELECT_CC in mayUseP9Setb()
4522 bool InnerIsSel = SetOrSelCC.getOpcode() == ISD::SELECT_CC; in mayUseP9Setb()
4524 SetOrSelCC.getOpcode() != ISD::SELECT_CC) in mayUseP9Setb()
5386 case ISD::SELECT_CC: { in Select()
5847 if (O.getOpcode() != ISD::SELECT_CC) in combineToCMPB()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1555 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in SparcTargetLowering()
1556 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in SparcTargetLowering()
1557 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in SparcTargetLowering()
1558 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in SparcTargetLowering()
1575 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); in SparcTargetLowering()
3040 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG, *this, in LowerOperation()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp130 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote); in MipsSETargetLowering()
249 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in MipsSETargetLowering()
253 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in MipsSETargetLowering()
258 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); in MipsSETargetLowering()
296 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in MipsSETargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp213 setOperationAction(ISD::SELECT_CC, T, Expand); in WebAssemblyTargetLowering()
273 for (auto Op : {ISD::BR_CC, ISD::SELECT_CC}) in WebAssemblyTargetLowering()
2058 return DAG.getNode(ISD::SELECT_CC, DL, MVT::i64, LHS[I], RHS[I], in LowerSETCC()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp2499 case ISD::SELECT_CC: in isI32Insn()
2529 if (User->getOpcode() == ISD::SELECT_CC || in isI32Insn()
2558 if (N->getOperand(0)->getOpcode() == ISD::SELECT_CC && in combineTRUNCATE()

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