| /freebsd-13.1/sys/dev/ppbus/ |
| H A D | ppb_1284.c | 215 if (!(ppb_rstr(bus) & SELECT) || !spin) { in ppb_peripheral_negociate()
346 if (!(ppb_rstr(bus) & SELECT)) { in byte_peripheral_outbyte()
382 if (!(ppb_rstr(bus) & SELECT)) { in byte_peripheral_outbyte()
710 if (ppb_poll_bus(bus, 40, nACK | SELECT | nFAULT, in ppb_1284_negociate()
711 SELECT | nFAULT, PPB_NOINTR | PPB_POLL)) { in ppb_1284_negociate()
719 PERROR | SELECT | nFAULT)) { in ppb_1284_negociate()
748 if (do_1284_wait(bus, nACK | SELECT, nACK)) { in ppb_1284_negociate()
754 if (do_1284_wait(bus, nACK | SELECT, SELECT | nACK)) { in ppb_1284_negociate()
774 if (do_1284_wait(bus, nACK | SELECT | nBUSY, in ppb_1284_negociate()
775 nACK | SELECT | nBUSY)) { in ppb_1284_negociate()
[all …]
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| H A D | pcfclock.c | 88 ((ppb_rstr(ppbus) & SELECT) == (i & 1 ? SELECT : 0))
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| H A D | ppb_1284.h | 57 #define Xflag SELECT
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| H A D | ppi.c | 248 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) == in ppiintr()
249 (SELECT | nBUSY)) { in ppiintr()
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| H A D | ppbconf.h | 57 #define SELECT 0x10 macro
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| H A D | ppb_base.c | 199 status->select = r & SELECT; in ppb_get_status()
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| /freebsd-13.1/lib/libc/gen/ |
| H A D | scandir.c | 51 #define SELECT(x) CALL_BLOCK(select, x) macro
56 #define SELECT(x) select(x) macro
91 if (select != NULL && !SELECT(d)) in scandir_b()
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| H A D | scandir-compat11.c | 59 #define SELECT(x) select(x) macro
85 if (select != NULL && !SELECT(d)) in freebsd11_scandir()
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| /freebsd-13.1/lib/libc/stdlib/ |
| H A D | heapsort.c | 120 #define SELECT(par_i, child_i, nmemb, par, child, size, k, count, tmp1, tmp2) { \ macro
198 SELECT(i, j, nmemb, t, p, size, k, cnt, tmp1, tmp2); in heapsort_b()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 486 setOperationAction(ISD::SELECT, VT, Expand); in AMDGPUTargetLowering()
537 setOperationAction(ISD::SELECT, MVT::v2f32, Promote); in AMDGPUTargetLowering()
540 setOperationAction(ISD::SELECT, MVT::v3f32, Promote); in AMDGPUTargetLowering()
603 setTargetDAGCombine(ISD::SELECT); in AMDGPUTargetLowering()
679 case ISD::SELECT: in hasSourceMods()
2077 Q = DAG.getNode(ISD::SELECT, DL, VT, Cond, in LowerUDIVREM()
2079 R = DAG.getNode(ISD::SELECT, DL, VT, Cond, in LowerUDIVREM()
2084 Q = DAG.getNode(ISD::SELECT, DL, VT, Cond, in LowerUDIVREM()
2086 R = DAG.getNode(ISD::SELECT, DL, VT, Cond, in LowerUDIVREM()
2447 NewOpr = DAG.getNode(ISD::SELECT, SL, MVT::i32, in LowerCTLZ_CTTZ()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 2417 { ISD::SELECT, MVT::v32i16, 1 }, in getCmpSelInstrCost()
2418 { ISD::SELECT, MVT::v64i8, 1 }, in getCmpSelInstrCost()
2427 { ISD::SELECT, MVT::v8i64, 1 }, in getCmpSelInstrCost()
2428 { ISD::SELECT, MVT::v16i32, 1 }, in getCmpSelInstrCost()
2429 { ISD::SELECT, MVT::v8f64, 1 }, in getCmpSelInstrCost()
2430 { ISD::SELECT, MVT::v16f32, 1 }, in getCmpSelInstrCost()
2445 { ISD::SELECT, MVT::v4i64, 1 }, // pblendvb in getCmpSelInstrCost()
2446 { ISD::SELECT, MVT::v8i32, 1 }, // pblendvb in getCmpSelInstrCost()
2447 { ISD::SELECT, MVT::v16i16, 1 }, // pblendvb in getCmpSelInstrCost()
2448 { ISD::SELECT, MVT::v32i8, 1 }, // pblendvb in getCmpSelInstrCost()
[all …]
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| /freebsd-13.1/contrib/kyua/integration/ |
| H A D | cmd_db_exec_test.sh | 57 kyua db-exec SELECT "*" FROM metadata
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| /freebsd-13.1/tests/sys/fs/fusefs/ |
| H A D | mockfs.hh | 265 SELECT, enumerator
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| H A D | dev_fuse_poll.cc | 67 return SELECT; in poll_method_from_string()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 1439 if (isa<FixedVectorType>(ValTy) && ISD == ISD::SELECT) { in getCmpSelInstrCost()
1464 { ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 }, in getCmpSelInstrCost()
1465 { ISD::SELECT, MVT::v8i1, MVT::v8i32, 8 }, in getCmpSelInstrCost()
1466 { ISD::SELECT, MVT::v16i1, MVT::v16i32, 16 }, in getCmpSelInstrCost()
1467 { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4 * AmortizationCost }, in getCmpSelInstrCost()
1468 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost }, in getCmpSelInstrCost()
1469 { ISD::SELECT, MVT::v16i1, MVT::v16i64, 16 * AmortizationCost } in getCmpSelInstrCost()
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| /freebsd-13.1/contrib/dialog/ |
| H A D | dlg_keys.c | 402 CURSES_NAME(SELECT),
463 DIALOG_NAME(SELECT),
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 679 SELECT, enumerator
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.h | 49 SELECT, enumerator
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| H A D | M68kInstrCompiler.td | 53 // CMOV* - Used to implement the SELECT DAG operation. Expanded after
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| /freebsd-13.1/contrib/libevent/test/ |
| H A D | include.am | 62 test/test.sh -b SELECT
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 442 assert(MI.getOpcode() == Lanai::SELECT && "unknown select instruction"); in analyzeSelect()
496 assert(MI.getOpcode() == Lanai::SELECT && "unknown select instruction"); in optimizeSelect()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 97 setOperationAction(ISD::SELECT, T, Legal); in initializeHVXLowering()
229 setOperationAction(ISD::SELECT, BoolV, Custom); in initializeHVXLowering()
1053 return DAG.getNode(ISD::SELECT, dl, VecTy, PickHi, InHi, InLo); in insertHvxSubvectorReg()
1059 IdxV = DAG.getNode(ISD::SELECT, dl, MVT::i32, PickHi, S, IdxV); in insertHvxSubvectorReg()
1060 SingleV = DAG.getNode(ISD::SELECT, dl, SingleTy, PickHi, V1, V0); in insertHvxSubvectorReg()
1100 return DAG.getNode(ISD::SELECT, dl, VecTy, PickHi, InHi, InLo); in insertHvxSubvectorReg()
1664 DAG.getNode(ISD::SELECT, dl, VecTy, Op.getOperand(0), in LowerHvxSelect()
2111 case ISD::SELECT: return LowerHvxSelect(Op, DAG); in LowerHvxOperation()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 849 if (CostKind == TTI::TCK_CodeSize && ISD == ISD::SELECT && in getCmpSelInstrCost()
919 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT && CondTy) { in getCmpSelInstrCost()
922 { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4*4 + 1*2 + 1 }, in getCmpSelInstrCost()
923 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 }, in getCmpSelInstrCost()
924 { ISD::SELECT, MVT::v16i1, MVT::v16i64, 100 } in getCmpSelInstrCost()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrFloat.td | 111 // ISD::SELECT requires its operand to conform to getBooleanContents, but
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 350 setOperationAction(ISD::SELECT, MVT::f32, Custom); in MipsTargetLowering()
351 setOperationAction(ISD::SELECT, MVT::f64, Custom); in MipsTargetLowering()
352 setOperationAction(ISD::SELECT, MVT::i32, Custom); in MipsTargetLowering()
371 setOperationAction(ISD::SELECT, MVT::i64, Custom); in MipsTargetLowering()
499 setTargetDAGCombine(ISD::SELECT); in MipsTargetLowering()
1163 case ISD::SELECT: in PerformDAGCombine()
1216 case ISD::SELECT: return lowerSELECT(Op, DAG); in LowerOperation()
2588 Lo = DAG.getNode(ISD::SELECT, DL, VT, Cond, in lowerShiftLeftParts()
2590 Hi = DAG.getNode(ISD::SELECT, DL, VT, Cond, ShiftLeftLo, Or); in lowerShiftLeftParts()
2639 Lo = DAG.getNode(ISD::SELECT, DL, VT, Cond, ShiftRightHi, Or); in lowerShiftRightParts()
[all …]
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