| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 327 int Rot = getT2SOImmValRotateVal(Arg); in getT2SOImmVal() local
328 if (Rot != -1) in getT2SOImmVal()
329 return Rot; in getT2SOImmVal()
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| H A D | ARMInstPrinter.cpp | 1375 unsigned Rot = (Op.getImm() & 0xF00) >> 7; in printModImmOperand() local
1389 int32_t Rotated = ARM_AM::rotr32(Bits, Rot); in printModImmOperand()
1403 << Rot << markup(">"); in printModImmOperand()
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| /freebsd-13.1/contrib/bearssl/T0/ |
| H A D | CPU.cs | 129 internal void Rot(int depth) in Rot() method in CPU
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| H A D | T0Comp.cs | 802 cpu.Rot(1); in T0Comp()
808 cpu.Rot(2); in T0Comp()
823 cpu.Rot(cpu.Pop()); in T0Comp()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1210 SDValue Rot = getInstr(Hexagon::V6_valignbi, dl, ByteTy, in compressHvxPred() local
1212 SDValue Vor = DAG.getNode(ISD::OR, dl, ByteTy, {Vrmpy, Rot}); in compressHvxPred()
2277 SDValue Rot = DAG.getNode(ISD::ADD, dl, ty(Rot0), {Rot0, Rot1}); in PerformHvxDAGCombine() local
2278 return DAG.getNode(HexagonISD::VROR, dl, ty(Op), {Vec, Rot}); in PerformHvxDAGCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 890 unsigned Rot; member
2616 Inst.addOperand(MCOperand::createImm(ModImm.Bits | (ModImm.Rot << 7))); in addModImmOperands()
3683 static std::unique_ptr<ARMOperand> CreateModImm(unsigned Bits, unsigned Rot, in CreateModImm() argument
3687 Op->ModImm.Rot = Rot; in CreateModImm()
4000 << ModImm.Rot << ")>"; in print()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 6094 auto *Rot = Builder.CreateOr(LShr, Shl); in ReduceSwitchRange() local
6095 SI->replaceUsesOfWith(SI->getCondition(), Rot); in ReduceSwitchRange()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6535 if (SDValue Rot = MatchRotate(N0, N1, SDLoc(N))) in visitOR() local
6536 return Rot; in visitOR()
6945 if (SDValue Rot = MatchRotate(LHS.getOperand(0), RHS.getOperand(0), DL)) { in MatchRotate() local
6946 return DAG.getNode(ISD::TRUNCATE, SDLoc(LHS), LHS.getValueType(), Rot); in MatchRotate()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 12592 SDValue Rot = DAG.getNode(ISD::OR, DL, RotateVT, SHL, SRL); in lowerShuffleAsBitRotate() local
12593 return DAG.getBitcast(VT, Rot); in lowerShuffleAsBitRotate()
12596 SDValue Rot = in lowerShuffleAsBitRotate() local
12599 return DAG.getBitcast(VT, Rot); in lowerShuffleAsBitRotate()
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