Searched refs:RootDef (Results 1 – 2 of 2) sorted by relevance
5720 if (!RootDef) in selectAddrModeUnscaled()5752 if (RootDef.getOpcode() != AArch64::G_ADD_LOW) in tryFoldAddLowIntoImm()5767 auto &MF = *RootDef.getParent()->getParent(); in tryFoldAddLowIntoImm()5772 MachineIRBuilder MIRBuilder(RootDef); in tryFoldAddLowIntoImm()5795 if (!RootDef) in selectAddrModeIndexed()5814 MachineOperand &LHS = RootDef->getOperand(1); in selectAddrModeIndexed()5815 MachineOperand &RHS = RootDef->getOperand(2); in selectAddrModeIndexed()5995 if (!RootDef) in selectArithExtendedRegister()6022 Ext = getExtendTypeForInst(*RootDef, MRI); in selectArithExtendedRegister()6025 ExtReg = RootDef->getOperand(1).getReg(); in selectArithExtendedRegister()[all …]
3779 if (const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg())) { in selectMUBUFScratchOffen() local3794 } else if (RootDef->getOpcode() == AMDGPU::G_FRAME_INDEX) { in selectMUBUFScratchOffen()3795 FI = RootDef->getOperand(1).getIndex(); in selectMUBUFScratchOffen()3874 const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg()); in selectDS1Addr1OffsetImpl() local3875 if (!RootDef) in selectDS1Addr1OffsetImpl()3890 } else if (RootDef->getOpcode() == AMDGPU::G_SUB) { in selectDS1Addr1OffsetImpl()3939 const MachineInstr *RootDef = MRI->getVRegDef(Root.getReg()); in selectDSReadWrite2Impl() local3940 if (!RootDef) in selectDSReadWrite2Impl()3957 } else if (RootDef->getOpcode() == AMDGPU::G_SUB) { in selectDSReadWrite2Impl()