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Searched refs:RegsToPass (Results 1 – 25 of 26) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp256 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCall() local
285 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
313 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
314 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
315 RegsToPass[i].second, Glue); in LowerCall()
338 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
339 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
340 RegsToPass[i].second.getValueType())); in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16ISelLowering.h48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
H A DMips16ISelLowering.cpp410 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, in getOpndList()
489 RegsToPass.push_front(std::make_pair(V0Reg, Callee)); in getOpndList()
497 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); in getOpndList()
502 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
H A DMipsSEISelLowering.h69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsISelLowering.cpp3051 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in getOpndList()
3053 RegsToPass[i].second, InFlag); in getOpndList()
3059 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in getOpndList()
3060 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first, in getOpndList()
3250 std::deque<std::pair<unsigned, SDValue>> RegsToPass; in LowerCall() local
3303 RegsToPass.push_back(std::make_pair(LocRegLo, Lo)); in LowerCall()
3304 RegsToPass.push_back(std::make_pair(LocRegHigh, Hi)); in LowerCall()
3343 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
4389 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in passByValArg() argument
4416 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); in passByValArg()
[all …]
H A DMipsISelLowering.h487 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
573 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsSEISelLowering.cpp1164 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in getOpndList() argument
1169 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp652 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
686 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
714 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCCCCallTo()
715 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCCCCallTo()
716 RegsToPass[I].second, InFlag); in LowerCCCCallTo()
747 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCCCCallTo()
748 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCCCCallTo()
749 RegsToPass[I].second.getValueType())); in LowerCCCCallTo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp776 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32() local
902 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32()
906 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32()
931 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32()
932 Register Reg = toCallerWindow(RegsToPass[i].first); in LowerCall_32()
956 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall_32()
1129 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall_64() local
1235 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_64()
1237 RegsToPass[i].first, RegsToPass[i].second, InGlue); in LowerCall_64()
1257 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall_64()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp821 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
849 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
887 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
888 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
889 RegsToPass[i].second, InFlag); in LowerCCCCallTo()
909 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
910 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
911 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp414 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass; in LowerCall() local
442 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
452 for (auto &Reg : RegsToPass) { in LowerCall()
478 for (auto &Reg : RegsToPass) in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1137 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
1163 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
1186 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
1187 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
1188 RegsToPass[i].second, InFlag); in LowerCCCCallTo()
1211 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
1212 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
1213 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp583 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
636 RegsToPass.push_back(std::make_pair(VE::SX12, Callee)); in LowerCall()
676 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
703 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
704 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall()
705 RegsToPass[i].second, InGlue); in LowerCall()
712 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
713 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
714 RegsToPass[i].second.getValueType())); in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp577 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
627 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
650 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); in LowerCall()
717 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
718 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall()
719 RegsToPass[i].second, InFlag); in LowerCall()
778 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
779 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
780 RegsToPass[i].second.getValueType())); in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp458 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; in LowerCall() local
522 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
547 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
548 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
549 RegsToPass[i].second, Glue); in LowerCall()
564 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
565 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
566 RegsToPass[i].second, Glue); in LowerCall()
593 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
594 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp5471 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in buildCallOperands()
5472 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in buildCallOperands()
5756 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32SVR4() local
5858 RegsToPass[i].second, InFlag); in LowerCall_32SVR4()
6090 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_64SVR4() local
6476 RegsToPass[i].second, InFlag); in LowerCall_64SVR4()
7207 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_AIX() local
7414 RegsToPass.push_back(std::make_pair( in LowerCall_AIX()
7424 RegsToPass.push_back(std::make_pair( in LowerCall_AIX()
7434 RegsToPass.push_back(std::make_pair( in LowerCall_AIX()
[all …]
H A DPPCISelLowering.h1265 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1284 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
1323 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
1359 for (auto Reg : RegsToPass) { in LowerCall()
1372 for (auto Reg : RegsToPass) { in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h338 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
H A DSIISelLowering.cpp2725 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass, in passSpecialInputs() argument
2791 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
2861 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
3046 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
3057 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain); in LowerCall()
3090 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg); in LowerCall()
3127 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
3197 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain); in LowerCall()
3206 for (auto &RegToPass : RegsToPass) { in LowerCall()
3263 for (auto &RegToPass : RegsToPass) { in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h767 SDValue &Arg, RegsToPassVector &RegsToPass,
H A DARMISelLowering.cpp2229 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument
2385 RegsToPassVector RegsToPass; in LowerCall() local
2456 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2486 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2511 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall()
2557 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
2558 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
2559 RegsToPass[i].second, InFlag); in LowerCall()
2731 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
2732 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1628 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; in LowerCall() local
1675 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
1716 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCall()
1717 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCall()
1718 RegsToPass[I].second, Glue); in LowerCall()
1729 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCall()
1730 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCall()
1731 RegsToPass[I].second.getValueType())); in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp7941 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local
7959 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
7973 RegsToPass.push_back(std::make_pair(RegHigh, Hi)); in LowerCall()
8038 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
8064 for (auto &Reg : RegsToPass) { in LowerCall()
8072 validateCCReservedRegs(RegsToPass, MF); in LowerCall()
8107 for (auto &Reg : RegsToPass) in LowerCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2677 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo)); in Passv64i1ArgInRegs()
4058 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local
4180 RegsToPass.push_back(std::make_pair( in LowerCall()
4219 RegsToPass.push_back(std::make_pair(Register(X86::AL), in LowerCall()
4228 RegsToPass.push_back(std::make_pair(F.PReg, Val)); in LowerCall()
4307 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
4308 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
4309 RegsToPass[i].second, InFlag); in LowerCall()
4351 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
4352 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
[all …]

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