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Searched refs:RegisterFile (Results 1 – 15 of 15) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp64 RegisterFile::RegisterFile(const MCSchedModel &SM, const MCRegisterInfo &mri, in RegisterFile() function in llvm::mca::RegisterFile
100 void RegisterFile::cycleStart() { in cycleStart()
105 void RegisterFile::onInstructionExecuted(Instruction *IS) { in onInstructionExecuted()
147 void RegisterFile::addRegisterFile(const MCRegisterFileDesc &RF, in addRegisterFile()
228 void RegisterFile::addRegisterWrite(WriteRef Write, in addRegisterWrite()
319 void RegisterFile::removeRegisterWrite( in removeRegisterWrite()
489 void RegisterFile::collectWrites( in collectWrites()
554 RegisterFile::RAWHazard
555 RegisterFile::checkRAWHazards(const MCSubtargetInfo &STI, in checkRAWHazards()
605 void RegisterFile::addRegisterRead(ReadState &RS, in addRegisterRead()
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/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MCA/Stages/
H A DInOrderIssueStage.h24 class RegisterFile; variable
54 RegisterFile &PRF;
112 InOrderIssueStage(const MCSubtargetInfo &STI, RegisterFile &PRF,
H A DRetireStage.h31 RegisterFile &PRF;
38 RetireStage(RetireControlUnit &R, RegisterFile &F, LSUnitBase &LS) in RetireStage()
H A DDispatchStage.h56 RegisterFile &PRF;
70 RegisterFile &F);
/freebsd-13.1/contrib/llvm-project/llvm/lib/MCA/
H A DContext.cpp41 auto PRF = std::make_unique<RegisterFile>(SM, MRI, Opts.RegisterFileSize); in createDefaultPipeline()
76 auto PRF = std::make_unique<RegisterFile>(SM, MRI, Opts.RegisterFileSize); in createInOrderPipeline()
/freebsd-13.1/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DInOrderIssueStage.cpp46 RegisterFile &PRF, CustomBehaviour &CB) in InOrderIssueStage()
102 static unsigned checkRegisterHazard(const RegisterFile &PRF, in checkRegisterHazard()
106 RegisterFile::RAWHazard Hazard = PRF.checkRAWHazards(STI, RS); in checkRegisterHazard()
148 static void addRegisterReadWrite(RegisterFile &PRF, Instruction &IS, in addRegisterReadWrite()
H A DDispatchStage.cpp31 RegisterFile &F) in DispatchStage()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h83 class RegisterFile : public HardwareUnit {
232 RegisterFile(const MCSchedModel &SM, const MCRegisterInfo &mri,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ScheduleBtVer2.td50 def JIntegerPRF : RegisterFile<64, [GR64, CCR], [1, 1], [1, 0],
63 def JFpuPRF: RegisterFile<72, [VR64, VR128, VR256], [1, 1, 2], [1, 1, 0],
H A DX86ScheduleZnver2.td103 def Zn2IntegerPRF : RegisterFile<168, [GR64, CCR]>;
113 def Zn2FpuPRF: RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
H A DX86ScheduleBdVer2.td98 def PdIntegerPRF : RegisterFile<96, [GR64, CCR]>;
115 def PdFpuPRF : RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
H A DX86ScheduleZnver1.td102 def ZnIntegerPRF : RegisterFile<168, [GR64, CCR]>;
112 def ZnFpuPRF: RegisterFile<160, [VR64, VR128, VR256], [1, 1, 2]>;
H A DX86ScheduleZnver3.td161 def Zn3IntegerPRF : RegisterFile<192, [GR64, CCR], [1, 1], [1, 0],
339 def Zn3FpPRF : RegisterFile<160, [VR64, VR128, VR256], [1, 1, 1], [0, 1, 1],
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSchedule.td538 class RegisterFile<int numPhysRegs, list<RegisterClass> Classes = [],
/freebsd-13.1/lib/clang/libllvm/
H A DMakefile831 SRCS_EXT+= MCA/HardwareUnits/RegisterFile.cpp