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Searched refs:RegisterBank (Results 1 – 25 of 44) sorted by relevance

12

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DRegisterBank.cpp22 const unsigned RegisterBank::InvalidID = UINT_MAX;
24 RegisterBank::RegisterBank( in RegisterBank() function in RegisterBank
32 bool RegisterBank::verify(const TargetRegisterInfo &TRI) const { in verify()
61 bool RegisterBank::covers(const TargetRegisterClass &RC) const { in covers()
66 bool RegisterBank::isValid() const { in isValid()
72 bool RegisterBank::operator==(const RegisterBank &OtherRB) const { in operator ==()
82 LLVM_DUMP_METHOD void RegisterBank::dump(const TargetRegisterInfo *TRI) const { in dump()
87 void RegisterBank::print(raw_ostream &OS, bool IsForDebug, in print()
H A DRegisterBankInfo.cpp58 RegisterBankInfo::RegisterBankInfo(RegisterBank **RegBanks, in RegisterBankInfo()
72 const RegisterBank &RegBank = getRegBank(Idx); in verify()
82 const RegisterBank *
93 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getRegBank()
112 const RegisterBank *RegisterBankInfo::getRegBankFromConstraints( in getRegBankFromConstraints()
140 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in constrainGenericRegister()
196 const RegisterBank *AltRegBank = getRegBank(Reg, MRI, TRI); in getInstrMappingImpl()
200 const RegisterBank *CurRegBank = IsCopyLike ? AltRegBank : nullptr; in getInstrMappingImpl()
241 const RegisterBank *AltRegBank = getRegBank(Reg, MRI, TRI); in getInstrMappingImpl()
268 const RegisterBank *RegBank) { in hashPartialMapping()
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/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DRegisterBankInfo.h33 class RegisterBank; variable
60 const RegisterBank *RegBank;
66 const RegisterBank &RegBank) in PartialMapping()
388 RegisterBank **RegBanks;
419 RegisterBankInfo(RegisterBank **RegBanks, unsigned NumRegBanks);
432 RegisterBank &getRegBank(unsigned ID) { in getRegBank()
545 const RegisterBank *
576 const RegisterBank &getRegBank(unsigned ID) const { in getRegBank()
603 virtual const RegisterBank &
614 virtual unsigned copyCost(const RegisterBank &A, const RegisterBank &B, in copyCost()
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H A DRegisterBank.h28 class RegisterBank {
43 RegisterBank(unsigned ID, const char *Name, unsigned Size,
74 bool operator==(const RegisterBank &OtherRB) const;
75 bool operator!=(const RegisterBank &OtherRB) const {
92 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
H A DCSEInfo.h164 class RegisterBank; variable
181 const GISelInstProfileBuilder &addNodeIDRegType(const RegisterBank *RB) const;
/freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterBankEmitter.cpp29 class RegisterBank { class
44 RegisterBank(const Record &TheDef) in RegisterBank() function in __anonc18d1d2a0111::RegisterBank
109 const std::vector<RegisterBank> &Banks);
111 const std::vector<RegisterBank> &Banks);
113 std::vector<RegisterBank> &Banks);
127 const std::vector<RegisterBank> &Banks) { in emitHeader()
146 const std::vector<RegisterBank> &Banks) { in emitBaseClassDefinition()
214 std::vector<RegisterBank> &Banks) { in emitBaseClassImplementation()
283 std::vector<RegisterBank> Banks; in run()
286 RegisterBank Bank(*V); in run()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBanks.td9 def SGPRRegBank : RegisterBank<"SGPR",
13 def VGPRRegBank : RegisterBank<"VGPR",
18 def VCCRegBank : RegisterBank <"VCC", [SReg_1]>;
20 def AGPRRegBank : RegisterBank <"AGPR",
H A DAMDGPURegisterBankInfo.h166 unsigned copyCost(const RegisterBank &A, const RegisterBank &B,
170 const RegisterBank *CurBank = nullptr) const override;
172 const RegisterBank &getRegBankFromRegClass(const TargetRegisterClass &RC,
H A DAMDGPURegisterBankInfo.cpp101 const RegisterBank *NewBank;
275 const RegisterBank &
1148 const RegisterBank *DstBank = in applyMappingLoad()
1553 const RegisterBank *DstBank = in applyMappingBFE()
1956 const RegisterBank &IdxBank = in foldExtractEltToCmpSelect()
1972 const RegisterBank &DstBank = in foldExtractEltToCmpSelect()
1974 const RegisterBank &SrcBank = in foldExtractEltToCmpSelect()
1977 const RegisterBank &CCBank = in foldExtractEltToCmpSelect()
2054 const RegisterBank &IdxBank = in foldInsertEltToCmpSelect()
2070 const RegisterBank &DstBank = in foldInsertEltToCmpSelect()
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H A DSIRegisterInfo.h25 class RegisterBank; variable
264 const RegisterBank &Bank,
269 const RegisterBank &Bank, in getRegClassForTypeOnBank()
H A DAMDGPUInstructionSelector.cpp87 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in isVCC()
218 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in selectPHI()
283 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_AND_OR_XOR()
310 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_ADD_SUB()
482 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, *MRI, TRI); in selectG_EXTRACT()
514 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_MERGE_VALUES()
599 const RegisterBank *DstBank = RBI.getRegBank(Dst, *MRI, TRI); in selectG_BUILD_VECTOR_TRUNC()
1183 const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI); in selectGroupStaticSize()
1881 const RegisterBank *DstRB; in selectG_TRUNC()
2227 const RegisterBank *DstRB = RBI.getRegBank(Dst, *MRI, TRI); in selectG_FNEG()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.h65 unsigned ValLength, const RegisterBank &RB);
136 unsigned copyCost(const RegisterBank &A, const RegisterBank &B,
139 const RegisterBank &getRegBankFromRegClass(const TargetRegisterClass &RC,
H A DAArch64RegisterBankInfo.cpp53 const RegisterBank &RBGPR = getRegBank(AArch64::GPRRegBankID); in AArch64RegisterBankInfo()
58 const RegisterBank &RBFPR = getRegBank(AArch64::FPRRegBankID); in AArch64RegisterBankInfo()
63 const RegisterBank &RBCCR = getRegBank(AArch64::CCRegBankID); in AArch64RegisterBankInfo()
213 unsigned AArch64RegisterBankInfo::copyCost(const RegisterBank &A, in copyCost()
214 const RegisterBank &B, in copyCost()
234 const RegisterBank &
623 const RegisterBank *DstRB = getRegBank(DstReg, MRI, TRI); in getInstrMapping()
624 const RegisterBank *SrcRB = getRegBank(SrcReg, MRI, TRI); in getInstrMapping()
648 const RegisterBank &DstRB = in getInstrMapping()
650 const RegisterBank &SrcRB = in getInstrMapping()
H A DAArch64InstructionSelector.cpp151 const RegisterBank &RB,
483 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
580 static unsigned getMinSizeForRegBank(const RegisterBank &RB) { in getMinSizeForRegBank()
680 const RegisterBank *PrevOpBank = nullptr; in unsupportedBinOp()
2306 const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>(); in select()
2463 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select()
2750 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); in select()
3984 const RegisterBank &DstRB = in selectSplitVectorUnmerge()
4774 unsigned LaneIdx, const RegisterBank &RB, in emitLaneInsert()
6142 const RegisterBank *DstRB = MRI.getRegBankOrNull(DstReg); in fixupPHIOpBanks()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterBanks.td13 def GPRRegBank : RegisterBank<"GPR", [XSeqPairsClass]>;
16 def FPRRegBank : RegisterBank<"FPR", [QQQQ]>;
19 def CCRegBank : RegisterBank<"CC", [CCR]>;
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/MIRParser/
H A DMIParser.h29 class RegisterBank; variable
44 const RegisterBank *RegBank;
51 using Name2RegBankMap = StringMap<const RegisterBank *>;
149 const RegisterBank *getRegBank(StringRef Name);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterBanks.td12 def GPRBRegBank : RegisterBank<"GPRB", [GPR32]>;
14 def FPRBRegBank : RegisterBank<"FPRB", [FGR64, AFGR64, MSA128D]>;
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DRegisterBank.td1 //===- RegisterBank.td - Register bank definitions ---------*- tablegen -*-===//
12 class RegisterBank<string name, list<RegisterClass> classes> {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMRegisterBanks.td12 def GPRRegBank : RegisterBank<"GPRB", [GPR, GPRwithAPSR]>;
13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
H A DARMRegisterBankInfo.h35 const RegisterBank &getRegBankFromRegClass(const TargetRegisterClass &RC,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterBanks.td13 def GPRRegBank : RegisterBank<"GPR", [GR64]>;
16 def VECRRegBank : RegisterBank<"VECR", [VR512]>;
H A DX86InstructionSelector.cpp200 const RegisterBank &RegBank = *RBI.getRegBank(Reg, MRI, TRI); in getRegClass()
236 const RegisterBank &DstRegBank = *RBI.getRegBank(DstReg, MRI, TRI); in selectCopy()
240 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); in selectCopy()
510 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp()
719 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI); in selectTruncOrPtrToInt()
720 const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI); in selectTruncOrPtrToInt()
848 const RegisterBank &DstRB = *RBI.getRegBank(DstReg, MRI, TRI); in selectAnyext()
849 const RegisterBank &SrcRB = *RBI.getRegBank(SrcReg, MRI, TRI); in selectAnyext()
1323 const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI); in selectMergeValues()
1392 const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI); in materializeFP()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterBanks.td13 def GPRRegBank : RegisterBank<"GPRB", [GPR]>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBanks.td15 def GPRRegBank : RegisterBank<"GPR", [G8RC]>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/GlSel/
H A DM68kRegisterBanks.td15 def GPRRegBank : RegisterBank<"AnyGPR", [DR8]>;

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