Searched refs:RegLo (Results 1 – 5 of 5) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2475 int64_t RegLo, RegHi; in ParseRegRange() local
2482 if (!parseExpr(RegLo)) in ParseRegRange()
2490 RegHi = RegLo; in ParseRegRange()
2496 if (!isUInt<32>(RegLo)) { in ParseRegRange()
2506 if (RegLo > RegHi) { in ParseRegRange()
2511 Num = static_cast<unsigned>(RegLo); in ParseRegRange()
2512 Width = (RegHi - RegLo) + 1; in ParseRegRange()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 7958 Register RegLo = VA.getLocReg(); in LowerCall() local
7959 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
7961 if (RegLo == RISCV::X17) { in LowerCall()
7971 assert(RegLo < RISCV::X31 && "Invalid register pair"); in LowerCall()
7972 Register RegHigh = RegLo + 1; in LowerCall()
8233 Register RegLo = VA.getLocReg(); in LowerReturn() local
8234 assert(RegLo < RISCV::X31 && "Invalid register pair"); in LowerReturn()
8235 Register RegHi = RegLo + 1; in LowerReturn()
8237 if (STI.isRegisterReservedByUser(RegLo) || in LowerReturn()
8243 Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue); in LowerReturn()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 1749 Register RegLo = TRI->getSubReg(Reg.getReg(), ARM::gsub_0); in addExclusiveRegPair() local
1751 MIB.addReg(RegLo, Flags); in addExclusiveRegPair()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 1948 Register RegLo = RI.getSubReg(Reg, AMDGPU::sub0); in expandPostRAPseudo() local
1958 Bundler.append(BuildMI(MF, DL, get(AMDGPU::S_ADD_U32), RegLo) in expandPostRAPseudo()
1959 .addReg(RegLo) in expandPostRAPseudo()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 4058 unsigned RegLo = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments_32SVR4() local
4060 SDValue ArgValueLo = DAG.getCopyFromReg(Chain, dl, RegLo, MVT::i32); in LowerFormalArguments_32SVR4()
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