Searched refs:RegHi (Results 1 – 5 of 5) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2475 int64_t RegLo, RegHi; in ParseRegRange() local
2487 if (!parseExpr(RegHi)) in ParseRegRange()
2490 RegHi = RegLo; in ParseRegRange()
2501 if (!isUInt<32>(RegHi)) { in ParseRegRange()
2506 if (RegLo > RegHi) { in ParseRegRange()
2512 Width = (RegHi - RegLo) + 1; in ParseRegRange()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 1750 Register RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1); in addExclusiveRegPair() local
1752 MIB.addReg(RegHi, Flags); in addExclusiveRegPair()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 1949 Register RegHi = RI.getSubReg(Reg, AMDGPU::sub1); in expandPostRAPseudo() local
1962 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AMDGPU::S_ADDC_U32), RegHi) in expandPostRAPseudo()
1963 .addReg(RegHi); in expandPostRAPseudo()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8235 Register RegHi = RegLo + 1; in LowerReturn() local
8238 STI.isRegisterReservedByUser(RegHi)) in LowerReturn()
8246 Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue); in LowerReturn()
8248 RetOps.push_back(DAG.getRegister(RegHi, MVT::i32)); in LowerReturn()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 4059 unsigned RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC); in LowerFormalArguments_32SVR4() local
4061 SDValue ArgValueHi = DAG.getCopyFromReg(Chain, dl, RegHi, MVT::i32); in LowerFormalArguments_32SVR4()
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