| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrShiftRotate.td | 16 /// ROL [~] ROR [~] ROXL [ ] ROXR [ ]
91 defm ROL : MxSROp<"rol", rotl, MxRODI_L, MxROOP_RO>;
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| /freebsd-13.1/sys/opencrypto/ |
| H A D | rmd160.c | 75 #define ROL(n, x) (((x) << (n)) | ((x) >> (32-(n)))) macro
85 a = ROL(sj, a + Fj(b,c,d) + X(rj) + Kj) + e; \
86 c = ROL(10, c); \
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 48 ROL, ///< Bit rotate left. enumerator
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| H A D | AVRISelLowering.cpp | 248 NODE(ROL); in getTargetNodeName()
320 Opc8 = AVRISD::ROL; in LowerShifts()
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| H A D | AVRInstrInfo.td | 59 def AVRrol : SDNode<"AVRISD::ROL", SDTIntUnaryOp>;
1828 def ROL : InstAlias<"rol\t$rd", (ADCRdRr GPR8:$rd, GPR8:$rd)>;
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| /freebsd-13.1/contrib/diff/src/ |
| H A D | io.c | 30 #define ROL(v, n) ((v) << (n) | (v) >> (sizeof (v) * CHAR_BIT - (n))) macro
33 #define HASH(h, c) ((c) + ROL (h, 7))
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SchedSandyBridge.td | 959 def: InstRW<[SBWriteResGroup85], (instregex "ROL(8|16|32|64)m(1|i)",
1004 def: InstRW<[SBWriteResGroup97_2], (instregex "ROL(8|16|32|64)mCL",
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| H A D | X86ScheduleAtom.td | 506 def : InstRW<[AtomWrite0_1], (instregex "(RCL|RCR|ROL|ROR|SAR|SHL|SHR)(8|16|32|64)m",
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| H A D | X86SchedBroadwell.td | 1114 def: InstRW<[BWWriteResGroup87], (instregex "ROL(8|16|32|64)m(1|i)",
1191 def: InstRW<[BWWriteResGroup100], (instregex "ROL(8|16|32|64)mCL",
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| H A D | X86SchedHaswell.td | 1192 def: InstRW<[HWWriteResGroup46], (instregex "ROL(8|16|32|64)m(1|i)",
1322 def: InstRW<[HWWriteResGroup69], (instregex "ROL(8|16|32|64)mCL",
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| H A D | X86SchedSkylakeClient.td | 1180 def: InstRW<[SKLWriteResGroup100], (instregex "ROL(8|16|32|64)m(1|i)",
1263 def: InstRW<[SKLWriteResGroup117], (instregex "ROL(8|16|32|64)mCL",
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| H A D | X86InstrCompiler.td | 1809 // ROL/ROR instructions allow a stronger mask optimization than shift for 8- and
1838 defm : MaskedRotateAmountPats<rotl, "ROL">;
2187 // register-register 16 bit bswap. This maps it to a ROL instruction.
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| H A D | X86SchedSkylakeServer.td | 1451 def: InstRW<[SKXWriteResGroup107], (instregex "ROL(8|16|32|64)m(1|i)",
1622 def: InstRW<[SKXWriteResGroup128], (instregex "ROL(8|16|32|64)mCL",
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| H A D | X86InstrInfo.td | 3678 defm : ShiftRotateByOneAlias<"rol", "ROL">;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoB.td | 295 def ROL : ALU_rr<0b0110000, 0b001, "rol">,
798 def : PatGprGpr<rotl, ROL>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2576 case Mips::ROL: in tryExpandInstruction()
4875 if (Inst.getOpcode() == Mips::ROL) { in expandRotation()
4893 case Mips::ROL: in expandRotation()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.td | 2525 def ROL : MipsAsmPseudoInst<(outs),
2532 (ROL GPR32Opnd:$rd, GPR32Opnd:$rd, GPR32Opnd:$rs), 0>;
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| /freebsd-13.1/contrib/diff/ |
| H A D | ChangeLog | 2082 * io.c (ROL): Use sizeof to make it more generic.
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| /freebsd-13.1/share/ctypedef/ |
| H A D | C.UTF-8.src | 29897 <LEPCHA_PUNCTUATION_TA-ROL>;/
29898 <LEPCHA_PUNCTUATION_NYET_THYOOM_TA-ROL>;/
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| /freebsd-13.1/share/misc/ |
| H A D | pci_vendors | 21596 8139 ROL/F-100 Fast Ethernet Adapter with ROL
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| /freebsd-13.1/tools/tools/locale/etc/final-maps/ |
| H A D | map.GB18030 | 5808 <LEPCHA_PUNCTUATION_TA-ROL> \x81\x35\xC1\…
5809 <LEPCHA_PUNCTUATION_NYET_THYOOM_TA-ROL> \x81\x35\xC1\…
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| H A D | map.UTF-8 | 6504 <LEPCHA_PUNCTUATION_TA-ROL> \xE1\xB0\xBB
6505 <LEPCHA_PUNCTUATION_NYET_THYOOM_TA-ROL> \xE1\xB0\xBC
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| /freebsd-13.1/share/colldef/ |
| H A D | zh_CN.GB18030.src | 56145 …UNCTUATION_TA-ROL> "<X0924><X1000>";<X05…
56146 …YET_THYOOM_TA-ROL> "<X0924><X1700>";<X05>;"<X05><XC0…
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| /freebsd-13.1/crypto/heimdal/lib/wind/ |
| H A D | NormalizationTest.txt | 5493 B864;B864;1105 1169 11AF;B864;1105 1169 11AF; # (롤; 롤; 롤; 롤; 롤; ) HANGUL SYLLABLE ROL
|