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Searched refs:Q_CSR (Results 1 – 2 of 2) sorted by relevance

/freebsd-13.1/sys/dev/msk/
H A Dif_msk.c3966 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), BMU_CLR_RESET); in msk_init_locked()
3967 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), BMU_OPER_INIT); in msk_init_locked()
3990 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_rxq, Q_CSR), BMU_CLR_RESET); in msk_init_locked()
3991 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_rxq, Q_CSR), BMU_OPER_INIT); in msk_init_locked()
4011 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_rxq, Q_CSR), reg); in msk_init_locked()
4185 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), BMU_STOP); in msk_stop()
4186 val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR)); in msk_stop()
4189 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), in msk_stop()
4191 val = CSR_READ_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR)); in msk_stop()
4210 CSR_WRITE_4(sc, Q_ADDR(sc_if->msk_txq, Q_CSR), in msk_stop()
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H A Dif_mskreg.h563 #define Q_CSR 0x34 /* 32 bit BMU Control/Status Register */ macro