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Searched refs:PRI (Results 1 – 21 of 21) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstrBundle.cpp318 PRI.Clobbered = true; in AnalyzePhysRegInBundle()
334 PRI.Read = true; in AnalyzePhysRegInBundle()
336 PRI.FullyRead = true; in AnalyzePhysRegInBundle()
338 PRI.Killed = true; in AnalyzePhysRegInBundle()
341 PRI.Defined = true; in AnalyzePhysRegInBundle()
343 PRI.FullyDefined = true; in AnalyzePhysRegInBundle()
350 if (PRI.FullyDefined || PRI.Clobbered) in AnalyzePhysRegInBundle()
351 PRI.DeadDef = true; in AnalyzePhysRegInBundle()
352 else if (PRI.Defined) in AnalyzePhysRegInBundle()
353 PRI.PartialDeadDef = true; in AnalyzePhysRegInBundle()
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H A DRDFRegisters.cpp247 return Units.anyCommon(PRI.getMaskUnits(RR.Reg)); in hasAliasOf()
260 BitVector T(PRI.getMaskUnits(RR.Reg)); in hasCoverOf()
275 Units |= PRI.getMaskUnits(RR.Reg); in insert()
293 return intersect(RegisterAggr(PRI).insert(RR)); in intersect()
302 return clear(RegisterAggr(PRI).insert(RR)); in clear()
311 RegisterAggr T(PRI); in intersectWith()
321 return RegisterAggr(PRI).insert(RR).clear(*this).makeRegRef(); in clearIn()
333 BitVector Regs = PRI.getUnitAliases(U); in makeRegRef()
339 Regs &= PRI.getUnitAliases(U); in makeRegRef()
363 OS << ' ' << printRegUnit(U, &PRI.getTRI()); in print()
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H A DTargetSchedule.cpp314 for (const MCWriteProcResEntry *PRI = STI->getWriteProcResBegin(SCDesc), in computeOutputLatency() local
315 *PRE = STI->getWriteProcResEnd(SCDesc); PRI != PRE; ++PRI) { in computeOutputLatency()
316 if (!SchedModel.getProcResource(PRI->ProcResourceIdx)->BufferSize) in computeOutputLatency()
H A DRDFLiveness.cpp150 if (RegisterAggr::isCoverOf(RR, RefRR, PRI)) in getAllReachingDefs()
321 RegisterAggr DefRRs(PRI); in getAllReachingDefsRecImpl()
384 if (!PRI.alias(R.Addr->getRegRef(DFG), RefRR)) in getNearestAliasedRef()
449 if (DefRRs.hasCoverOf(DR) || !PRI.alias(RefRR, DR)) in getAllReachedUses()
492 RegisterAggr DRs(PRI); in computePhiInfo()
564 RegisterAggr Covered(PRI); in computePhiInfo()
573 RegisterRef S = PRI.mapTo(RC, UI->first); in computePhiInfo()
601 RegisterAggr DefRRs(PRI); in computePhiInfo()
704 R = PRI.mapTo(DRs.intersectWith(R), T.first); in computePhiInfo()
838 RegisterAggr TA(PRI); in computeLiveIns()
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H A DRDFGraph.cpp654 : MF(mf), TII(tii), TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(toi), in DataFlowGraph()
655 LiveIns(PRI) { in DataFlowGraph()
979 return RegisterRef(PRI.getRegMaskId(Op.getRegMask()), LaneBitmask::getAll()); in makeRegRef()
989 if (PRI.alias(AR, BR)) in restrictRef()
1057 for (RegisterId A : PRI.getAliasSet(RR.Reg)) { in pushClobbers()
1112 for (RegisterId A : PRI.getAliasSet(RR.Reg)) { in pushDefs()
1272 if (PRI.alias(DR, UR)) in buildStmt()
1434 if (I != RR && RegisterAggr::isCoverOf(I, RR, PRI)) in buildPhis()
1460 if (PRI.alias(RR, MaxRefs[I])) in buildPhis()
1571 RegisterAggr Defs(PRI); in linkRefUp()
/freebsd-13.1/contrib/tcpdump/
H A Dprint-medsa.c68 #define PRI(medsa) (medsa->bytes[4] >> 5) macro
107 ND_PRINT((ndo, ", pri %d: ", PRI(medsa))); in medsa_print_full()
117 ND_PRINT((ndo, ", pri %d: ", PRI(medsa))); in medsa_print_full()
131 ND_PRINT((ndo, ", pri %d: ", PRI(medsa))); in medsa_print_full()
H A Dconfigure.ac791 # OK, we have inttypes.h, but does it define all the PRI[doxu]64 macros?
794 AC_MSG_CHECKING([[whether inttypes.h defines the PRI[doxu]64 macros]])
H A Dconfigure.in805 # OK, we have inttypes.h, but does it define all the PRI[doxu]64 macros?
808 AC_MSG_CHECKING([[whether inttypes.h defines the PRI[doxu]64 macros]])
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRDFRegisters.h170 : Units(pri.getTRI().getNumRegUnits()), PRI(pri) {} in RegisterAggr()
183 const PhysicalRegisterInfo &PRI) { in isCoverOf()
184 return RegisterAggr(PRI).insert(RA).hasCoverOf(RB); in isCoverOf()
246 const PhysicalRegisterInfo &PRI; member
H A DRDFLiveness.h80 : DFG(g), TRI(g.getTRI()), PRI(g.getPRI()), MDT(g.getDT()),
127 const PhysicalRegisterInfo &PRI;
H A DRDFGraph.h664 const PhysicalRegisterInfo &getPRI() const { return PRI; } in getPRI()
868 const PhysicalRegisterInfo PRI; member
/freebsd-13.1/sys/contrib/device-tree/Bindings/iommu/
H A Darm,smmu-v3.yaml16 and event queues and adding support for the ATS and PRI components of
45 - const: priq # PRI Queue not empty
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ConditionalCompares.cpp355 PhysRegInfo PRI = AnalyzePhysRegInBundle(*I, AArch64::NZCV, TRI); in findConvertibleCompare() local
357 if (PRI.Read) { in findConvertibleCompare()
366 if (PRI.Defined || PRI.Clobbered) { in findConvertibleCompare()
/freebsd-13.1/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,sdm845.txt74 link-name = "PRI MI2S Playback";
/freebsd-13.1/contrib/netbsd-tests/bin/ps/
H A Dkeywords81 pri PRI
/freebsd-13.1/contrib/apr/include/
H A Dapr.h.in179 /* C++ needs this too for PRI*NN formats: */
/freebsd-13.1/share/misc/
H A Diso3166200 PR PRI 630 Puerto Rico
H A Dpci_vendors7432 9011 5535-1P-PRI
7433 9013 5535-2P-PRI
7436 9031 5536-1P-PRI
7437 9033 5536-2P-PRI
14274 e015 Diva PRI PCI v2
14286 e01c PRI
14299 e01e 2PRI
14302 e020 4PRI
14585 001d DataFire RAS T1/E1/PRI
14618 00c9 Digi Neo 2 DB9 PRI
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/freebsd-13.1/contrib/tzdata/
H A Dafrica408 # check the time. PRI's The World. 2015-01-30 15:15 -05.
H A Deurope3054 # 25 RU-PRI Primorsky Krai
/freebsd-13.1/contrib/wpa/wpa_supplicant/
H A DChangeLog401 - do not allow 40 MHz co-ex PRI/SEC switch to force MCC