Searched refs:PPRRegClass (Results 1 – 6 of 6) sorted by relevance
763 } else if (AArch64::PPRRegClass.contains(Reg)) { in PrintAsmOperand()764 RegClass = &AArch64::PPRRegClass; in PrintAsmOperand()
50 if (AArch64::PPRRegClass.contains(Reg)) in regNeedsCFI()
2298 else if (AArch64::PPRRegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()2810 if (AArch64::PPRRegClass.contains(Reg) || in determineCalleeSaves()2967 AArch64::PPRRegClass.contains(CS.getReg())) { in getSVECalleeSaveSlotRange()
3343 if (AArch64::PPRRegClass.contains(DestReg) && in copyPhysReg()3344 AArch64::PPRRegClass.contains(SrcReg)) { in copyPhysReg()3681 else if (AArch64::PPRRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()3835 else if (AArch64::PPRRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
290 addRegisterClass(MVT::nxv2i1, &AArch64::PPRRegClass); in AArch64TargetLowering()291 addRegisterClass(MVT::nxv4i1, &AArch64::PPRRegClass); in AArch64TargetLowering()292 addRegisterClass(MVT::nxv8i1, &AArch64::PPRRegClass); in AArch64TargetLowering()293 addRegisterClass(MVT::nxv16i1, &AArch64::PPRRegClass); in AArch64TargetLowering()5169 RC = &AArch64::PPRRegClass; in LowerFormalArguments()8283 : std::make_pair(0U, &AArch64::PPRRegClass); in getRegForInlineAsmConstraint()
4699 auto PPRRegClass = AArch64MCRegisterClasses[AArch64::PPRRegClassID]; in validateInstruction() local4706 PPRRegClass.contains(Inst.getOperand(i).getReg())) { in validateInstruction()