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Searched refs:PFALSE (Results 1 – 5 of 5) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h71 PFALSE, enumerator
H A DHexagonISelLowering.cpp1897 case HexagonISD::PFALSE: return "HexagonISD::PFALSE"; in getTargetNodeName()
2787 return DAG.getNode(HexagonISD::PFALSE, dl, VecTy); in LowerBUILD_VECTOR()
3288 case HexagonISD::PFALSE: in PerformDAGCombine()
H A DHexagonPatterns.td109 def HexagonPFALSE: SDNode<"HexagonISD::PFALSE", SDTVecLeaf>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SVEInstrInfo.td660 def PFALSE : sve_int_pfalse<0b000000, "pfalse">;
1174 (ZIP1_PPP_S PPR:$Ps, (PFALSE))>;
1176 (ZIP2_PPP_S PPR:$Ps, (PFALSE))>;
1178 (ZIP1_PPP_H PPR:$Ps, (PFALSE))>;
1180 (ZIP2_PPP_H PPR:$Ps, (PFALSE))>;
1182 (ZIP1_PPP_B PPR:$Ps, (PFALSE))>;
1184 (ZIP2_PPP_B PPR:$Ps, (PFALSE))>;
H A DAArch64SchedA64FX.td3303 def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PFALSE)>;