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Searched refs:Opcode1 (Results 1 – 5 of 5) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/tools/llvm-readobj/
H A DARMEHABIPrinter.h112 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_1000iiii_iiiiiiii() local
159 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_10110001_0000iiii() local
163 ((Opcode1 & 0xf0) || Opcode1 == 0x00) ? "spare" : "pop "); in Decode_10110001_0000iiii()
164 if (((Opcode1 & 0xf0) == 0x00) && Opcode1) in Decode_10110001_0000iiii()
165 PrintGPR((Opcode1 & 0x0f)); in Decode_10110001_0000iiii()
188 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_10110011_sssscccc() local
210 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_11000110_sssscccc() local
220 uint8_t Opcode1 = Opcodes[OI++ ^ 3]; in Decode_11000111_0000iiii() local
223 ((Opcode1 & 0xf0) || Opcode1 == 0x00) ? "spare" : "pop "); in Decode_11000111_0000iiii()
224 if ((Opcode1 & 0xf0) == 0x00 && Opcode1) in Decode_11000111_0000iiii()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DReassociate.cpp157 static BinaryOperator *isReassociableOp(Value *V, unsigned Opcode1, in isReassociableOp() argument
161 (I->getOpcode() == Opcode1 || I->getOpcode() == Opcode2)) in isReassociableOp()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp3115 int64_t Offset1, unsigned Opcode1, int FI2, in shouldClusterFI() argument
3124 int Scale1 = AArch64InstrInfo::getMemScale(Opcode1); in shouldClusterFI()
H A DAArch64ISelLowering.cpp12298 unsigned Opcode1 = SUB->getOperand(1).getOpcode(); in performVecReduceAddCombineWithUADDLP() local
12306 if (Opcode0 == ISD::ZERO_EXTEND && Opcode1 == ISD::ZERO_EXTEND) { in performVecReduceAddCombineWithUADDLP()
12308 } else if (Opcode0 == ISD::SIGN_EXTEND && Opcode1 == ISD::SIGN_EXTEND) { in performVecReduceAddCombineWithUADDLP()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp38071 unsigned Opcode1 = N1.getOpcode(); in combineTargetShuffle() local
38072 if (Opcode1 == ISD::FADD || Opcode1 == ISD::FMUL || Opcode1 == ISD::FSUB || in combineTargetShuffle()
38073 Opcode1 == ISD::FDIV) { in combineTargetShuffle()
38077 (N11 == N0 && (Opcode1 == ISD::FADD || Opcode1 == ISD::FMUL))) { in combineTargetShuffle()
38084 SDValue Scl = DAG.getNode(Opcode1, DL, SVT, N10, N11); in combineTargetShuffle()