| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineSSAUpdater.cpp | 124 Register NewVR = MRI->createVirtualRegister(RC); in InsertNewDef() local
125 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef()
226 Register NewVR; in RewriteUse() local
229 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse()
231 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
234 U.setReg(NewVR); in RewriteUse()
|
| H A D | PeepholeOptimizer.cpp | 605 Register NewVR = MRI->createVirtualRegister(RC); in INITIALIZE_PASS_DEPENDENCY() local
607 TII->get(TargetOpcode::COPY), NewVR) in INITIALIZE_PASS_DEPENDENCY()
612 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
785 Register NewVR = MRI.createVirtualRegister(NewRC); in insertPHI() local
788 TII.get(TargetOpcode::PHI), NewVR); in insertPHI()
|
| H A D | TargetInstrInfo.cpp | 864 Register NewVR = MRI.createVirtualRegister(RC); in reassociateOps() local
865 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in reassociateOps()
874 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) in reassociateOps()
880 .addReg(NewVR, getKillRegState(true)); in reassociateOps()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 5144 Register NewVR = MRI.createVirtualRegister(RC); in genNeg() local
5151 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genNeg()
5153 return NewVR; in genNeg()
5165 Register NewVR = in genFusedMultiplyAccNeg() local
5192 Register NewVR = in genFusedMultiplyIdxNeg() local
5327 Register NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local
5919 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence() local
5966 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence() local
6026 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence() local
6046 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence() local
[all …]
|
| H A D | AArch64ISelLowering.cpp | 17703 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
17713 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
17720 .addReg(NewVR); in insertCopiesSplitCSR()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 1403 Register NewVR = MRI->createVirtualRegister(RC); in generateInserts() local
1404 RegMap[VR] = NewVR; in generateInserts()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 1422 Register NewVR = in selectDSGWSIntrinsic() local
1424 BuildMI(*MBB, &*MIB, DL, TII.get(AMDGPU::REG_SEQUENCE), NewVR) in selectDSGWSIntrinsic()
1429 MIB.addReg(NewVR, 0, AMDGPU::sub0); in selectDSGWSIntrinsic()
1430 MIB.addReg(NewVR, RegState::Implicit); in selectDSGWSIntrinsic()
|
| H A D | SIISelLowering.cpp | 2281 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
2284 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
2291 .addReg(NewVR); in insertCopiesSplitCSR()
4278 Register NewVR = in EmitInstrWithCustomInserter() local
4281 BuildMI(*BB, MI, DL, TII->get(AMDGPU::REG_SEQUENCE), NewVR) in EmitInstrWithCustomInserter()
4286 Op->setReg(NewVR); in EmitInstrWithCustomInserter()
4288 MI.addOperand(MachineOperand::CreateReg(NewVR, false, true)); in EmitInstrWithCustomInserter()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 20775 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
20785 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
20792 .addReg(NewVR); in insertCopiesSplitCSR()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 52528 Register NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local
52538 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR()
52545 .addReg(NewVR); in insertCopiesSplitCSR()
|