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Searched refs:MemIndexedMode (Results 1 – 25 of 30) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h104 ISD::MemIndexedMode &AM,
108 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DAVRISelDAGToDAG.cpp123 ISD::MemIndexedMode AM = LD->getAddressingMode(); in selectIndexedLoad()
170 ISD::MemIndexedMode AM = LD->getAddressingMode(); in selectIndexedProgMemLoad()
H A DAVRISelLowering.cpp887 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
944 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h987 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
2233 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2246 ISD::MemIndexedMode getAddressingMode() const {
2247 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2267 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2295 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2328 ISD::MemIndexedMode AM, EVT MemVT,
2347 ISD::MemIndexedMode getAddressingMode() const {
2348 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2369 ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
[all …]
H A DSelectionDAG.h1218 SDValue Offset, ISD::MemIndexedMode AM);
1219 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1226 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl,
1238 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1247 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1308 SDValue Offset, ISD::MemIndexedMode AM);
1312 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1315 SDValue Offset, ISD::MemIndexedMode AM);
1318 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
1322 ISD::MemIndexedMode AM);
H A DISDOpcodes.h1304 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC }; enum
H A DBasicTTIImpl.h176 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) { in getISDIndexedMode()
309 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedLoadLegal()
315 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedStoreLegal()
H A DTargetLowering.h3197 ISD::MemIndexedMode &/*AM*/, in getPreIndexedAddressParts() argument
3208 ISD::MemIndexedMode &/*AM*/, in getPostIndexedAddressParts() argument
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1277 enum MemIndexedMode { enum
1286 bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const;
1289 bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const;
1685 virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const = 0;
1686 virtual bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const = 0;
2218 bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedLoadLegal()
2221 bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedStoreLegal()
H A DTargetTransformInfoImpl.h694 bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedLoadLegal()
699 bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedStoreLegal()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h185 ISD::MemIndexedMode &AM,
H A DMSP430ISelDAGToDAG.cpp299 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
H A DMSP430ISelLowering.cpp1337 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1071 ISD::MemIndexedMode &AM, bool &IsInc,
1074 ISD::MemIndexedMode &AM,
1077 SDValue &Offset, ISD::MemIndexedMode &AM,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h502 ISD::MemIndexedMode &AM,
509 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DARMISelDAGToDAG.cpp826 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetReg()
862 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImmPre()
882 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImm()
961 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
1081 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1390 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1442 ISD::MemIndexedMode AM; in SelectT2AddrModeImm7Offset()
1586 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryARMIndexedLoad()
1666 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT1IndexedLoad()
1692 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT2IndexedLoad()
[all …]
H A DARMInstrMVE.td7022 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7027 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7106 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7121 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
/freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp963 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, in isIndexedLoadLegal()
968 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, in isIndexedStoreLegal()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h272 ISD::MemIndexedMode &AM,
H A DHexagonISelDAGToDAG.cpp450 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
559 ISD::MemIndexedMode AM = ST->getAddressingMode(); in SelectStore()
H A DHexagonISelLowering.cpp634 SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1175 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1186 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1227 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1233 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h803 ISD::MemIndexedMode &AM,
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp492 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
H A DSelectionDAG.cpp7353 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
7377 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
7464 ISD::MemIndexedMode AM) { in getIndexedLoad()
7595 ISD::MemIndexedMode AM) { in getIndexedStore()
7625 ISD::MemIndexedMode AM, in getMaskedLoad()
7657 ISD::MemIndexedMode AM) { in getIndexedMaskedLoad()
7670 ISD::MemIndexedMode AM, bool IsTruncating, in getMaskedStore()
7705 ISD::MemIndexedMode AM) { in getIndexedMaskedStore()

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