| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 42 MachineRegisterInfo &MRI,
47 bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
49 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
55 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
57 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
67 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
78 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
87 bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI,
116 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
[all …]
|
| H A D | AMDGPURegisterBankInfo.h | 53 MachineRegisterInfo &MRI,
60 MachineRegisterInfo &MRI) const;
64 MachineRegisterInfo &MRI,
67 MachineRegisterInfo &MRI,
74 MachineRegisterInfo &MRI) const;
77 MachineRegisterInfo &MRI) const;
81 MachineRegisterInfo &MRI, int RSrcIdx) const;
143 const MachineInstr &MI, const MachineRegisterInfo &MRI) const;
149 unsigned getMappingType(const MachineRegisterInfo &MRI,
184 MachineRegisterInfo &MRI,
[all …]
|
| H A D | SIRegisterInfo.h | 163 bool isSGPRReg(const MachineRegisterInfo &MRI, Register Reg) const;
222 MCRegister findUnusedRegister(const MachineRegisterInfo &MRI,
227 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
229 bool isVGPR(const MachineRegisterInfo &MRI, Register Reg) const;
230 bool isAGPR(const MachineRegisterInfo &MRI, Register Reg) const;
231 bool isVectorRegister(const MachineRegisterInfo &MRI, Register Reg) const { in isVectorRegister()
265 const MachineRegisterInfo &MRI) const;
270 const MachineRegisterInfo &MRI) const { in getRegClassForTypeOnBank()
276 const MachineRegisterInfo &MRI) const override;
299 MachineRegisterInfo &MRI,
|
| H A D | GCNRegPressure.h | 26 class MachineRegisterInfo; variable
71 const MachineRegisterInfo &MRI);
94 static unsigned getRegKind(Register Reg, const MachineRegisterInfo &MRI);
116 mutable const MachineRegisterInfo *MRI = nullptr;
142 const MachineRegisterInfo &MRI);
199 const MachineRegisterInfo &MRI);
203 const MachineRegisterInfo &MRI);
262 GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI, in getRegPressure()
275 const MachineRegisterInfo &MRI);
|
| H A D | SIInstrInfo.h | 33 class MachineRegisterInfo; variable
63 MachineRegisterInfo &MRI,
117 MachineRegisterInfo &MRI,
733 const MachineRegisterInfo &MRI = MF.getRegInfo(); in isVGPRCopy()
739 const MachineRegisterInfo &MRI = MF.getRegInfo(); in hasVGPRUses()
836 bool usesConstantBus(const MachineRegisterInfo &MRI,
849 const MachineRegisterInfo &MRI) const;
912 bool isLegalVSrcOperand(const MachineRegisterInfo &MRI,
918 bool isLegalRegOperand(const MachineRegisterInfo &MRI,
1127 MachineRegisterInfo &MRI) { in isOfRegClass()
[all …]
|
| H A D | AMDGPUInstructionSelector.h | 45 class MachineRegisterInfo; variable
54 MachineRegisterInfo *MRI;
81 bool isVCC(Register Reg, const MachineRegisterInfo &MRI) const;
84 Register Reg, const MachineRegisterInfo &MRI,
136 void getAddrModeInfo(const MachineInstr &Load, const MachineRegisterInfo &MRI,
181 selectVOP3PModsImpl(Register Src, const MachineRegisterInfo &MRI) const;
239 const MachineRegisterInfo &MRI) const;
|
| H A D | AMDGPUGlobalISelUtils.h | 18 class MachineRegisterInfo; variable
24 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg);
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 35 class MachineRegisterInfo; variable
85 Register constrainRegToClass(MachineRegisterInfo &MRI,
100 MachineRegisterInfo &MRI,
119 MachineRegisterInfo &MRI,
166 const MachineRegisterInfo &MRI);
202 const MachineRegisterInfo &MRI);
238 T *getOpcodeDef(Register Reg, const MachineRegisterInfo &MRI) { in getOpcodeDef()
252 const MachineRegisterInfo &MRI);
272 bool isKnownNeverNaN(Register Val, const MachineRegisterInfo &MRI,
352 const MachineRegisterInfo &MRI);
[all …]
|
| H A D | MIPatternMatch.h | 38 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
52 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
65 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
79 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
96 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
132 bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { in match()
244 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
268 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
391 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
479 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
[all …]
|
| H A D | RegisterBankInfo.h | 31 class MachineRegisterInfo; variable
290 MachineRegisterInfo &MRI;
324 MachineRegisterInfo &MRI);
335 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI()
548 const MachineRegisterInfo &MRI) const;
585 const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
647 MachineRegisterInfo &MRI);
731 unsigned getSizeInBits(Register Reg, const MachineRegisterInfo &MRI,
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 42 void MachineRegisterInfo::Delegate::anchor() {} in anchor()
44 MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) in MachineRegisterInfo() function in MachineRegisterInfo
63 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank()
69 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass()
85 MachineRegisterInfo::constrainRegClass(Register Reg, in constrainRegClass()
92 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs()
122 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass()
182 void MachineRegisterInfo::setType(Register VReg, LLT Ty) { in setType()
202 void MachineRegisterInfo::clearVirtRegs() { in clearVirtRegs()
255 void MachineRegisterInfo::verifyUseLists() const { in verifyUseLists()
[all …]
|
| H A D | MIRVRegNamerUtils.h | 29 class MachineRegisterInfo; variable
48 MachineRegisterInfo &MRI;
85 VRegRenamer(MachineRegisterInfo &MRI) : MRI(MRI) {} in VRegRenamer()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.h | 38 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
40 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
43 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
47 bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
53 bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
55 bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
57 bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,
|
| H A D | AArch64PostLegalizerLowering.cpp | 218 static bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
247 static bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
268 static bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
284 static bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
341 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
521 const MachineRegisterInfo &MRI) { in tryAdjustICmpImmAndPred()
617 MachineInstr &MI, const MachineRegisterInfo &MRI, in matchAdjustICmpImmAndPred()
634 MachineRegisterInfo &MRI = *MIB.getMRI(); in applyAdjustICmpImmAndPred()
644 bool matchDupLane(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDupLane()
696 bool applyDupLane(MachineInstr &MI, MachineRegisterInfo &MRI, in applyDupLane()
[all …]
|
| H A D | AArch64GlobalISelUtils.h | 36 const MachineRegisterInfo &MRI);
41 const MachineRegisterInfo &MRI);
46 const MachineRegisterInfo &MRI);
|
| H A D | AArch64PostLegalizerCombiner.cpp | 52 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd()
95 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
111 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended()
117 static bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended()
123 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine()
236 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
246 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFoldMergeToZext()
254 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldMergeToZext()
|
| H A D | AArch64InstructionSelector.cpp | 1106 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect()
1438 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit()
1511 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ()
1558 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptCompareBranchFedByICmp()
1872 MachineRegisterInfo &MRI = MF.getRegInfo(); in materializeLargeCMVal()
1908 MachineRegisterInfo &MRI = MF.getRegInfo(); in preISelLower()
4538 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptSelect()
5710 MachineRegisterInfo &MRI = in selectAddrModeUnscaled()
5871 MachineRegisterInfo &MRI = in selectShiftedRegister()
5968 MachineRegisterInfo &MRI = *MIB.getMRI(); in moveScalarRegClass()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 28 class MachineRegisterInfo; variable
135 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
138 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
141 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
144 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
147 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
150 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
153 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
156 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
159 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
|
| H A D | RDFDeadCode.h | 31 class MachineRegisterInfo; variable
35 DeadCodeElimination(DataFlowGraph &dfg, MachineRegisterInfo &mri) in DeadCodeElimination()
53 MachineRegisterInfo &MRI;
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 52 MachineRegisterInfo &MRI) { in IsRegInClass()
62 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSReg()
66 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVRReg()
70 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) { in IsF8Reg()
74 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSFReg()
78 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSSReg()
86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in processBlock()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 38 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
50 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
95 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
142 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands()
181 MachineRegisterInfo &MRI) { in canReplaceReg()
195 const MachineRegisterInfo &MRI) { in isTriviallyDead()
419 const MachineRegisterInfo &MRI) { in getOpcodeDef()
632 MachineRegisterInfo &MRI = MF.getRegInfo(); in getFunctionLiveInPhysReg()
928 const MachineRegisterInfo &MRI) { in isBuildVectorAllZeros()
933 const MachineRegisterInfo &MRI) { in isBuildVectorAllOnes()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 59 void processCandidate(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
62 void processDstReg(MachineRegisterInfo *MRI, Register &DstReg,
65 void processInst(MachineRegisterInfo *MRI, MachineInstr *Inst,
67 void checkADDrr(MachineRegisterInfo *MRI, MachineOperand *RelocOp,
69 void checkShift(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
91 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
145 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
159 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
194 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
231 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 87 bool selectZext(MachineInstr &I, MachineRegisterInfo &MRI,
89 bool selectAnyext(MachineInstr &I, MachineRegisterInfo &MRI,
91 bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
93 bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
95 bool selectUadde(MachineInstr &I, MachineRegisterInfo &MRI,
102 bool selectInsert(MachineInstr &I, MachineRegisterInfo &MRI,
104 bool selectExtract(MachineInstr &I, MachineRegisterInfo &MRI,
116 bool selectDivRem(MachineInstr &I, MachineRegisterInfo &MRI,
315 MachineRegisterInfo &MRI = MF.getRegInfo(); in select()
475 const MachineRegisterInfo &MRI, in X86SelectAddress()
[all …]
|
| H A D | X86DomainReassignment.cpp | 103 MachineRegisterInfo *MRI) const = 0;
107 MachineRegisterInfo *MRI) const = 0;
118 MachineRegisterInfo *MRI) const override { in convertInstr()
124 MachineRegisterInfo *MRI) const override { in getExtraCost()
152 MachineRegisterInfo *MRI) const override { in convertInstr()
164 MachineRegisterInfo *MRI) const override { in getExtraCost()
180 MachineRegisterInfo *MRI) const override { in convertInstr()
200 MachineRegisterInfo *MRI) const override { in getExtraCost()
235 MachineRegisterInfo *MRI) const override { in getExtraCost()
266 MachineRegisterInfo *MRI) const override { in convertInstr()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 66 MachineRegisterInfo *MRI;
105 const MachineRegisterInfo *MRI) { in isGPR64()
114 const MachineRegisterInfo *MRI) { in isFPR64()
128 const MachineRegisterInfo *MRI, in getSrcFromCopy()
209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
241 for (MachineRegisterInfo::use_instr_nodbg_iterator in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
|