Searched refs:MFOCRF (Results 1 – 9 of 9) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 410 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) && in get_crbitm_encoding() 437 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) || in getMachineOpValue()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 871 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRSpilling() 1029 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRBitSpilling() 1084 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), RegO) in lowerCRBitRestore()
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| H A D | PPCISelLowering.h | 209 MFOCRF, enumerator
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| H A D | PPC.td | 83 "Enable the MFOCRF instruction">;
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| H A D | PPCAsmPrinter.cpp | 1328 case PPC::MFOCRF: in emitInstruction() 1334 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; in emitInstruction()
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| H A D | PPCISelDAGToDAG.cpp | 4432 IntCR = SDValue(CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, CR7Reg, in trySETCC() 5082 case PPCISD::MFOCRF: { in Select() 5084 ReplaceNode(N, CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, in Select()
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| H A D | PPCInstrInfo.cpp | 1712 BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg).addReg(CRReg); in copyPhysReg() 1726 unsigned MvCode = Is64Bit ? PPC::MFOCRF8 : PPC::MFOCRF; in copyPhysReg()
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| H A D | PPCISelLowering.cpp | 1633 case PPCISD::MFOCRF: return "PPCISD::MFOCRF"; in getTargetNodeName() 10399 SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32, in LowerINTRINSIC_WO_CHAIN() 15348 if (FlagUser->getOpcode() == PPCISD::MFOCRF) in PerformDAGCombine()
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| H A D | PPCInstrInfo.td | 3069 def MFOCRF: XFXForm_5a<31, 19, (outs gprc:$rT), (ins crbitm:$FXM),
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