Home
last modified time | relevance | path

Searched refs:LoadReg (Results 1 – 6 of 6) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DStackSlotColoring.cpp443 unsigned LoadReg = 0; in RemoveDeadStores() local
447 if (!(LoadReg = TII->isLoadFromStackSlot(*I, FirstSS, LoadSize))) in RemoveDeadStores()
457 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1 || in RemoveDeadStores()
464 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp2239 Register LoadReg = getRegForValue(LI); in tryToFoldLoad() local
2240 if (!LoadReg) in tryToFoldLoad()
2246 if (!MRI.hasOneUse(LoadReg)) in tryToFoldLoad()
2249 MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LoadReg); in tryToFoldLoad()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp450 Register LoadReg = LoadMI->getDstReg(); in matchCombineExtendingLoads() local
452 LLT LoadValueTy = MRI.getType(LoadReg); in matchCombineExtendingLoads()
479 for (auto &UseMI : MRI.use_nodbg_instructions(LoadReg)) { in matchCombineExtendingLoads()
721 Register LoadReg; in applySextInRegOfLoad() local
723 std::tie(LoadReg, ScalarSizeBits) = MatchInfo; in applySextInRegOfLoad()
724 GLoad *LoadDef = cast<GLoad>(MRI.getVRegDef(LoadReg)); in applySextInRegOfLoad()
H A DLegalizerHelper.cpp2902 Register LoadReg = DstReg; in lowerLoad() local
2909 LoadReg = MRI.createGenericVirtualRegister(WideMemTy); in lowerLoad()
2914 MIRBuilder.buildSExtInReg(LoadReg, NewLoad, MemSizeInBits); in lowerLoad()
2919 MIRBuilder.buildAssertZExt(LoadReg, NewLoad, MemSizeInBits); in lowerLoad()
2921 MIRBuilder.buildLoad(LoadReg, PtrReg, *NewMMO); in lowerLoad()
2925 MIRBuilder.buildTrunc(DstReg, LoadReg); in lowerLoad()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp766 Register LoadReg; in handleConstantAddresses() local
768 LoadReg = I->second; in handleConstantAddresses()
792 LoadReg = createResultReg(RC); in handleConstantAddresses()
794 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg); in handleConstantAddresses()
801 LocalValueMap[V] = LoadReg; in handleConstantAddresses()
806 AM.Base.Reg = LoadReg; in handleConstantAddresses()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp4445 Register LoadReg = MI->getOperand(1).getReg(); in optimizeIntExtLoad() local
4446 LoadMI = MRI.getUniqueVRegDef(LoadReg); in optimizeIntExtLoad()