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Searched refs:Load2 (Results 1 – 8 of 8) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h424 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
442 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
H A DX86InstrInfo.cpp6602 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
6604 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
6607 unsigned Opc2 = Load2->getMachineOpcode(); in areLoadsFromSameBasePtr()
6777 return Load1->getOperand(I) == Load2->getOperand(I); in areLoadsFromSameBasePtr()
6791 auto Disp2 = dyn_cast<ConstantSDNode>(Load2->getOperand(X86::AddrDisp)); in areLoadsFromSameBasePtr()
6800 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
6808 unsigned Opc2 = Load2->getMachineOpcode(); in shouldScheduleLoadsNear()
H A DX86ISelLowering.cpp45787 SDValue Load2 = DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr2, in combineLoad() local
45792 Load1.getValue(1), Load2.getValue(1)); in combineLoad()
45794 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h247 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
258 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
H A DARMBaseInstrInfo.cpp1914 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1920 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
1944 switch (Load2->getMachineOpcode()) { in areLoadsFromSameBasePtr()
1965 if (Load1->getOperand(0) != Load2->getOperand(0) || in areLoadsFromSameBasePtr()
1966 Load1->getOperand(4) != Load2->getOperand(4)) in areLoadsFromSameBasePtr()
1970 if (Load1->getOperand(3) != Load2->getOperand(3)) in areLoadsFromSameBasePtr()
1975 isa<ConstantSDNode>(Load2->getOperand(1))) { in areLoadsFromSameBasePtr()
1977 Offset2 = cast<ConstantSDNode>(Load2->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
2011 if ((Load1->getMachineOpcode() != Load2->getMachineOpcode()) && in shouldScheduleLoadsNear()
2013 Load2->getMachineOpcode() == ARM::t2LDRBi12) || in shouldScheduleLoadsNear()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1309 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1323 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h185 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp10375 LoadSDNode *Load2 = cast<LoadSDNode>(Op2); in tryToFoldExtendSelectLoad() local
10377 !TLI.isLoadExtLegal(ExtLoadOpcode, VT, Load2->getMemoryVT())) in tryToFoldExtendSelectLoad()