| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrShiftRotate.td | 15 /// SHL [~] ASR [~] LSR [~] SWAP [ ]
88 defm LSR : MxSROp<"lsr", srl, MxRODI_R, MxROOP_LS>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 35 LSR, enumerator
56 case AArch64_AM::LSR: return "lsr"; in getShiftExtendName()
77 case 1: return AArch64_AM::LSR; in getShiftType()
105 case AArch64_AM::LSR: STEnc = 1; break; in getShifterImm()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 41 LSR, ///< Logical shift right. enumerator
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| H A D | AVRISelLowering.cpp | 247 NODE(LSR); in getTargetNodeName()
328 Opc8 = AVRISD::LSR; in LowerShifts()
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| H A D | AVRInstrInfo.td | 58 def AVRlsr : SDNode<"AVRISD::LSR", SDTIntUnaryOp>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/ |
| H A D | OrcV2CBindings.cpp | 124 LLVMOrcLookupStateRef LSR = ::wrap(OrcV2CAPIHelper::extractLookupState(LS)); in tryToGenerate() local
167 auto Err = unwrap(TryToGenerate(::wrap(this), Ctx, &LSR, CLookupKind, in tryToGenerate()
172 OrcV2CAPIHelper::resetLookupState(LS, ::unwrap(LSR)); in tryToGenerate()
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| /freebsd-13.1/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 124 static inline uint32_t LSR(const uint32_t value, const uint32_t amount, in LSR() function
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 496 LSR, enumerator
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 403 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSR, 56)), in emitHwasanMemaccessSymbols()
493 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSR, 56)), in emitHwasanMemaccessSymbols()
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| H A D | AArch64SchedPredicates.td | 49 def CheckShiftLSR : CheckImmOperand_s<3, "AArch64_AM::LSR">;
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| H A D | AArch64ISelDAGToDAG.cpp | 499 return AArch64_AM::LSR; in getShiftTypeForNode()
2250 } else if (AArch64_AM::getShiftType(ShiftTypeAndValue) == AArch64_AM::LSR) { in getUsefulBitsFromOrWithShiftedReg()
2712 SDNode *LSR = CurDAG->getMachineNode( in tryBitfieldInsertOpFromOr() local
2721 SDValue Ops[] = {Dst, SDValue(LSR, 0), in tryBitfieldInsertOpFromOr()
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| H A D | AArch64FastISel.cpp | 1253 case Instruction::LShr: ShiftType = AArch64_AM::LSR; break; in emitAddSub()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 2714 LatticeCell LSR; in evaluateHexCondMove() local
2715 if (!evaluate(R, LR, LSR)) in evaluateHexCondMove()
2717 RC.meet(LSR); in evaluateHexCondMove()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 338 def : InstRW<[WriteALUsi], (instregex "(t|t2)(LSL|LSR|ASR|ROR)")>;
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| H A D | ARMInstrThumb.td | 1179 // LSR immediate
1190 // LSR register
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| H A D | ARMScheduleR52.td | 330 (instregex "ASRr", "RORS?r", "LSR", "LSL")>;
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| H A D | ARMScheduleA57.td | 219 // (ASR, LSL, LSR, ROR, RRX)=MOVsi, MVN
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| H A D | ARMInstrInfo.td | 6332 // LSR, ROR, and RRX instructions.
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| /freebsd-13.1/sys/crypto/openssl/arm/ |
| H A D | bsaes-armv7.S | 1434 mov r6, #:lower16:(.LREVM0SR-.LSR)
1437 sub r6, r8, #.LREVM0SR-.LSR @ pass constants
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1338 return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR || in isShifter()
1433 return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR || in isArithmeticShifter()
1444 return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR || in isLogicalShifter()
3203 .Case("lsr", AArch64_AM::LSR) in tryParseOptionalShiftExtend()
3226 if (ShOp == AArch64_AM::LSL || ShOp == AArch64_AM::LSR || in tryParseOptionalShiftExtend()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 272 defm LSR : ArcBinaryEXT5Inst<0b000001, "lsr">;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | LoopStrengthReduce.cpp | 6236 const LSRInstance &LSR) { in GetInductionVariable() argument
6239 for (const WeakVH &IV : LSR.getScalarEvolutionIVs()) { in GetInductionVariable()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5857 return AArch64_AM::LSR; in getShiftTypeForInst()
|