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Searched refs:LD1 (Results 1 – 7 of 7) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td2489 // We must do vector loads with LD1 in big-endian.
2503 // We must do vector loads with LD1 in big-endian.
2635 // We must use LD1 to perform vector loads in big-endian.
2656 // We must use LD1 to perform vector loads in big-endian.
6669 defm LD1 : SIMDLd1Multiple<"ld1">;
6769 (LD1 VecListOne128:$Rd, VecIndex:$idx, GPR64sp:$Rn)>;
6780 // Generate LD1 for extload if memory type does not match the
6785 // In this case, the index must be adjusted to match LD1 type.
6789 Instruction LD1, SDNodeXForm IdxOp>
6837 defm LD1 : SIMDLdSt1SingleAliases<"ld1">;
[all …]
H A DAArch64SchedKryoDetails.td1017 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)$")>;
1023 (instregex "LD1(i8|i16|i32)$")>;
1035 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)_POST$")>;
1041 (instregex "LD1(i8|i16|i32)_POST$")>;
H A DAArch64SchedFalkorDetails.td781 def : InstRW<[FalkorWr_1LD_3cyc, FalkorReadIncLd], (instregex "^LD1(i64|Onev(8b|4h|2s|1d|16b|…
783 … (instregex "^LD1(i64|Onev(8b|4h|2s|1d|16b|8h|4s|2d))_POST$")>;
H A DAArch64InstrFormats.td9836 // LD1 instructions have extra "1d" variants.
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp12540 LoadSDNode *LD1 = dyn_cast<LoadSDNode>(getBuildPairElt(N, 0)); in CombineConsecutiveLoads() local
12547 std::swap(LD1, LD2); in CombineConsecutiveLoads()
12549 if (!LD1 || !LD2 || !ISD::isNON_EXTLoad(LD1) || !LD1->hasOneUse() || in CombineConsecutiveLoads()
12550 LD1->getAddressSpace() != LD2->getAddressSpace()) in CombineConsecutiveLoads()
12552 EVT LD1VT = LD1->getValueType(0); in CombineConsecutiveLoads()
12555 DAG.areNonVolatileConsecutiveLoads(LD2, LD1, LD1Bytes, 1)) { in CombineConsecutiveLoads()
12556 Align Alignment = LD1->getAlign(); in CombineConsecutiveLoads()
12562 return DAG.getLoad(VT, SDLoc(N), LD1->getChain(), LD1->getBasePtr(), in CombineConsecutiveLoads()
12563 LD1->getPointerInfo(), Alignment); in CombineConsecutiveLoads()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp13779 LoadSDNode *LD1 = dyn_cast<LoadSDNode>(PreviousInput); in combineBVOfConsecutiveLoads() local
13786 if (!isConsecutiveLS(LD2, LD1, ElemSize, 1, DAG)) in combineBVOfConsecutiveLoads()
13788 if (!isConsecutiveLS(LD1, LD2, ElemSize, 1, DAG)) in combineBVOfConsecutiveLoads()
13805 LoadSDNode *LD1 = dyn_cast<LoadSDNode>(FirstLoadOp); in combineBVOfConsecutiveLoads() local
13808 assert(LD1 && "Input needs to be a LoadSDNode."); in combineBVOfConsecutiveLoads()
13809 return DAG.getLoad(N->getValueType(0), dl, LD1->getChain(), in combineBVOfConsecutiveLoads()
13810 LD1->getBasePtr(), LD1->getPointerInfo(), in combineBVOfConsecutiveLoads()
13811 LD1->getAlignment()); in combineBVOfConsecutiveLoads()
/freebsd-13.1/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_neon.td723 def LD1 : WInst<"vld1", ".(c*!)", "dQdPlQPl">;