Searched refs:IsSub (Results 1 – 9 of 9) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kFrameLowering.cpp | 340 bool IsSub = NumBytes < 0; in emitSPUpdate() local 341 uint64_t Offset = IsSub ? -NumBytes : NumBytes; in emitSPUpdate() 352 if (IsSub && !isRegLiveIn(MBB, M68k::D0)) in emitSPUpdate() 360 Opc = IsSub ? M68k::SUB32rr : M68k::ADD32rr; in emitSPUpdate() 374 MBB, MBBI, DL, IsSub ? -ThisVal : ThisVal, InEpilogue); in emitSPUpdate() 375 if (IsSub) in emitSPUpdate() 427 bool IsSub = Offset < 0; in BuildStackAdjustment() local 428 uint64_t AbsOffset = IsSub ? -Offset : Offset; in BuildStackAdjustment() 429 unsigned Opc = IsSub ? M68k::SUB32ri : M68k::ADD32ri; in BuildStackAdjustment()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 593 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters() local 597 if (!IsSub) in FindSuitableFreeRegisters()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1799 bool IsSub = ExtOpc == Hexagon::S4_subaddi; in replaceInstrExpr() local 1800 Register Rs = MI.getOperand(IsSub ? 3 : 2); in replaceInstrExpr() 1801 ExtValue V = MI.getOperand(IsSub ? 2 : 3); in replaceInstrExpr() 1802 assert(EV == V && Rs == Ex.Rs && IsSub == Ex.Neg && "Initializer mismatch"); in replaceInstrExpr()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 351 bool IsSub = Offset < 0; in BuildStackAdjustment() local 352 uint64_t AbsOffset = IsSub ? -Offset : Offset; in BuildStackAdjustment() 353 const unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset) in BuildStackAdjustment()
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| H A D | X86ISelLowering.cpp | 49506 bool IsSub = N->getOpcode() == ISD::SUB; in combineAddOrSubToADCOrSBB() local 49512 if (!IsSub && X.getOpcode() == ISD::ZERO_EXTEND && in combineAddOrSubToADCOrSBB() 49542 (IsSub && CC == X86::COND_B && ConstantX->isNullValue())) { in combineAddOrSubToADCOrSBB() 49552 (IsSub && CC == X86::COND_A && ConstantX->isNullValue())) { in combineAddOrSubToADCOrSBB() 49574 return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL, in combineAddOrSubToADCOrSBB() 49594 return DAG.getNode(IsSub ? X86ISD::SBB : X86ISD::ADC, DL, in combineAddOrSubToADCOrSBB() 49603 return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL, in combineAddOrSubToADCOrSBB() 49625 return DAG.getNode(IsSub ? X86ISD::ADC : X86ISD::SBB, DL, in combineAddOrSubToADCOrSBB() 49650 if ((IsSub && CC == X86::COND_NE && ConstantX->isNullValue()) || in combineAddOrSubToADCOrSBB() 49664 if ((IsSub && CC == X86::COND_E && ConstantX->isNullValue()) || in combineAddOrSubToADCOrSBB() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3174 bool IsSub = Opc == ARM::SUBrr || Opc == ARM::t2SUBrr || in optimizeCompareInstr() local 3179 if (!IsSub || in optimizeCompareInstr() 3186 ARMCC::CondCodes NewCC = (IsSub ? getSwappedCondition(CC) : getCmpToAddCondition(CC)); in optimizeCompareInstr()
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| H A D | ARMISelDAGToDAG.cpp | 2700 bool IsSub = SDValueToConstBool(N->getOperand(2)); in SelectBaseMVE_VMLLDAV() local 2703 assert(!IsSub && in SelectBaseMVE_VMLLDAV() 2721 if (IsSub) in SelectBaseMVE_VMLLDAV()
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| /freebsd-13.1/contrib/llvm-project/clang/lib/AST/ |
| H A D | ExprConstant.cpp | 12357 bool IsSub) { in addOrSubLValueAsInteger() argument 12365 Offset = CharUnits::fromQuantity(IsSub ? Offset64 - Index64 in addOrSubLValueAsInteger()
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| /freebsd-13.1/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaChecking.cpp | 14507 bool IsSub, ASTContext &Ctx) { in getAlignmentAndOffsetFromBinAddOrSub() argument 14521 if (IsSub) in getAlignmentAndOffsetFromBinAddOrSub()
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