| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 606 bool IsSignaling = false) const;
609 bool IsSignaling) const;
|
| H A D | SystemZISelLowering.cpp | 2628 bool IsSignaling = false) { in getCmp() argument
2648 else if (!IsSignaling) in getCmp()
2892 bool IsSignaling) const { in lowerVectorSETCC()
2895 assert (!IsSignaling || Chain); in lowerVectorSETCC()
2896 CmpMode Mode = IsSignaling ? CmpMode::SignalingFP : in lowerVectorSETCC()
2981 bool IsSignaling) const { in lowerSTRICT_FSETCC()
2990 Chain, IsSignaling); in lowerSTRICT_FSETCC()
2994 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL, Chain, IsSignaling)); in lowerSTRICT_FSETCC()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/IR/ |
| H A D | IRBuilder.cpp | 923 MDNode *FPMathTag, bool IsSignaling) { in CreateFCmpHelper() argument
925 auto ID = IsSignaling ? Intrinsic::experimental_constrained_fcmps in CreateFCmpHelper()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 1813 bool IsSignaling) { in FloatExpandSetCCOperands() argument
1827 RHSHi, ISD::SETOEQ, Chain, IsSignaling); in FloatExpandSetCCOperands()
1830 RHSLo, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
1835 ISD::SETUNE, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
1838 RHSHi, CCCode, OutputChain, IsSignaling); in FloatExpandSetCCOperands()
|
| H A D | LegalizeTypes.h | 654 SDValue &Chain, bool IsSignaling = false);
|
| H A D | TargetLowering.cpp | 299 bool IsSignaling) const { in softenSetCCOperands()
8836 bool IsSignaling) const { in LegalizeSetCCCondCode()
8947 SetCC1 = DAG.getSetCC(dl, VT, LHS, RHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
8948 SetCC2 = DAG.getSetCC(dl, VT, LHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
8951 SetCC1 = DAG.getSetCC(dl, VT, LHS, LHS, CC1, Chain, IsSignaling); in LegalizeSetCCCondCode()
8952 SetCC2 = DAG.getSetCC(dl, VT, RHS, RHS, CC2, Chain, IsSignaling); in LegalizeSetCCCondCode()
|
| H A D | LegalizeDAG.cpp | 3562 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode() local
3570 NeedInvert, dl, Chain, IsSignaling); in ExpandNode()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Support/ |
| H A D | APFloat.cpp | 2837 bool IsSignaling = str.front() == 's' || str.front() == 'S'; in convertFromStringSpecials() local
2838 if (IsSignaling) { in convertFromStringSpecials()
2849 makeNaN(IsSignaling, IsNegative); in convertFromStringSpecials()
2875 makeNaN(IsSignaling, IsNegative, &Payload); in convertFromStringSpecials()
|
| /freebsd-13.1/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 12525 bool IsSignaling) { in EmitX86BuiltinExpr() argument
12528 if (IsSignaling) in EmitX86BuiltinExpr()
14487 bool IsSignaling; in EmitX86BuiltinExpr() local
14491 case 0x00: Pred = FCmpInst::FCMP_OEQ; IsSignaling = false; break; in EmitX86BuiltinExpr()
14492 case 0x01: Pred = FCmpInst::FCMP_OLT; IsSignaling = true; break; in EmitX86BuiltinExpr()
14493 case 0x02: Pred = FCmpInst::FCMP_OLE; IsSignaling = true; break; in EmitX86BuiltinExpr()
14494 case 0x03: Pred = FCmpInst::FCMP_UNO; IsSignaling = false; break; in EmitX86BuiltinExpr()
14495 case 0x04: Pred = FCmpInst::FCMP_UNE; IsSignaling = false; break; in EmitX86BuiltinExpr()
14512 IsSignaling = !IsSignaling; in EmitX86BuiltinExpr()
14580 if (IsSignaling) in EmitX86BuiltinExpr()
[all …]
|
| H A D | CGExprScalar.cpp | 823 llvm::CmpInst::Predicate FCmpOpc, bool IsSignaling);
4013 bool IsSignaling) { in EmitCompare() argument
4109 if (!IsSignaling) in EmitCompare()
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1060 bool IsSignaling = false) {
1068 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
|
| H A D | TargetLowering.h | 3258 bool IsSignaling = false) const;
4593 bool IsSignaling = false) const;
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 5357 bool IsSignaling = Node->getOpcode() == X86ISD::STRICT_FCMPS; in Select() local
5363 Opc = IsSignaling ? X86::COM_Fpr32 : X86::UCOM_Fpr32; in Select()
5366 Opc = IsSignaling ? X86::COM_Fpr64 : X86::UCOM_Fpr64; in Select()
5369 Opc = IsSignaling ? X86::COM_Fpr80 : X86::UCOM_Fpr80; in Select()
|
| H A D | X86ISelLowering.cpp | 23047 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerVSETCC() local
23079 if (IsStrict && IsAlwaysSignaling && !IsSignaling) in LowerVSETCC()
23083 if (IsStrict && !IsAlwaysSignaling && IsSignaling) { in LowerVSETCC()
23143 SSECC |= (IsAlwaysSignaling ^ IsSignaling) << 4; in LowerVSETCC()
23660 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local
23662 DAG.getNode(IsSignaling ? X86ISD::STRICT_FCMPS : X86ISD::STRICT_FCMP, in LowerSETCC()
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IRBuilder.h | 2372 bool IsSignaling);
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2478 bool IsSignaling) { in emitStrictFPComparison() argument
2483 IsSignaling ? AArch64ISD::STRICT_FCMPE : AArch64ISD::STRICT_FCMP; in emitStrictFPComparison()
7201 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC() local
7220 IsSignaling); in LowerSETCC()
7250 Cmp = emitStrictFPComparison(LHS, RHS, dl, DAG, Chain, IsSignaling); in LowerSETCC()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 10082 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC() local
10088 DAG, LHS.getValueType(), LHS, RHS, CC, dl, LHS, RHS, Chain, IsSignaling); in LowerFSETCC()
10110 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()
10114 Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()
|