Searched refs:IsSRA (Results 1 – 5 of 5) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 540 SDValue lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const;
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| H A D | RISCVISelLowering.cpp | 3082 bool IsSRA) const { in lowerShiftRightParts()
3105 unsigned ShiftRightOp = IsSRA ? ISD::SRA : ISD::SRL; in lowerShiftRightParts()
3122 IsSRA ? DAG.getNode(ISD::SRA, DL, VT, Hi, XLenMinus1) : Zero; in lowerShiftRightParts()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 549 bool IsSRA) const;
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| H A D | MipsISelLowering.cpp | 2597 bool IsSRA) const { in lowerShiftRightParts()
2623 SDValue ShiftRightHi = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, in lowerShiftRightParts()
2635 IsSRA ? Ext : DAG.getConstant(0, DL, VT), Or, in lowerShiftRightParts()
2641 IsSRA ? Ext : DAG.getConstant(0, DL, VT), ShiftRightHi); in lowerShiftRightParts()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 6640 bool IsSRA = Node->getOpcode() == ISD::SRA_PARTS; in expandShiftParts() local
6654 SDValue Tmp1 = IsSRA ? DAG.getNode(ISD::SRA, dl, VT, ShOpHi, in expandShiftParts()
6664 Tmp3 = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, dl, VT, ShOpHi, SafeShAmt); in expandShiftParts()
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