Searched refs:IsPre (Results 1 – 4 of 4) sorted by relevance
1309 bool IsPre = AM == ISD::PRE_INC || AM == ISD::PRE_DEC; in tryIndexedLoad() local1319 Opcode = IsPre ? AArch64::LDRXpre : AArch64::LDRXpost; in tryIndexedLoad()1322 Opcode = IsPre ? AArch64::LDRWpre : AArch64::LDRWpost; in tryIndexedLoad()1324 Opcode = IsPre ? AArch64::LDRSWpre : AArch64::LDRSWpost; in tryIndexedLoad()1326 Opcode = IsPre ? AArch64::LDRWpre : AArch64::LDRWpost; in tryIndexedLoad()1339 Opcode = IsPre ? AArch64::LDRHHpre : AArch64::LDRHHpost; in tryIndexedLoad()1359 Opcode = IsPre ? AArch64::LDRHpre : AArch64::LDRHpost; in tryIndexedLoad()1361 Opcode = IsPre ? AArch64::LDRHpre : AArch64::LDRHpost; in tryIndexedLoad()1363 Opcode = IsPre ? AArch64::LDRSpre : AArch64::LDRSpost; in tryIndexedLoad()1365 Opcode = IsPre ? AArch64::LDRDpre : AArch64::LDRDpost; in tryIndexedLoad()[all …]
51 bool IsPre; member
891 MatchInfo.IsPre = findPreIndexCandidate(MI, MatchInfo.Addr, MatchInfo.Base, in matchCombineIndexedLoadStore()893 if (!MatchInfo.IsPre && in matchCombineIndexedLoadStore()936 MIB.addImm(MatchInfo.IsPre); in applyCombineIndexedLoadStore()
3217 bool IsPre, MachineRegisterInfo &MRI) const { in isIndexingLegal() argument