| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.h | 76 bool IsMasked, bool IsStridedOrIndexed,
80 void selectVLSEG(SDNode *Node, bool IsMasked, bool IsStrided);
81 void selectVLSEGFF(SDNode *Node, bool IsMasked);
82 void selectVLXSEG(SDNode *Node, bool IsMasked, bool IsOrdered);
83 void selectVSSEG(SDNode *Node, bool IsMasked, bool IsStrided);
84 void selectVSXSEG(SDNode *Node, bool IsMasked, bool IsOrdered);
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| H A D | RISCVISelDAGToDAG.cpp | 216 if (IsMasked) { in addVectorLoadStoreOperands()
246 if (IsMasked) { in selectVLSEG()
287 if (IsMasked) { in selectVLSEGFF()
331 if (IsMasked) { in selectVLXSEG()
374 if (IsMasked) in selectVSSEG()
404 if (IsMasked) in selectVSXSEG()
996 if (IsMasked) in Select()
1027 bool IsMasked = IntNo == Intrinsic::riscv_vle_mask || in Select() local
1037 if (IsMasked) in Select()
1058 bool IsMasked = IntNo == Intrinsic::riscv_vleff_mask; in Select() local
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| H A D | RISCVExpandAtomicPseudoInsts.cpp | 52 bool IsMasked, int Width,
56 AtomicRMWInst::BinOp, bool IsMasked, int Width,
59 MachineBasicBlock::iterator MBBI, bool IsMasked,
343 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicBinOp() argument
363 if (!IsMasked) in expandAtomicBinOp()
392 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicMinMaxOp() argument
394 assert(IsMasked == true && in expandAtomicMinMaxOp()
512 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool IsMasked, in expandAtomicCmpXchg() argument
541 static_cast<AtomicOrdering>(MI.getOperand(IsMasked ? 6 : 5).getImm()); in expandAtomicCmpXchg()
543 if (!IsMasked) { in expandAtomicCmpXchg()
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| H A D | RISCVISelLowering.cpp | 3648 bool IsMasked = NumOps == 6; in LowerINTRINSIC_WO_CHAIN() local
3649 unsigned OpOffset = IsMasked ? 1 : 0; in LowerINTRINSIC_WO_CHAIN()
3698 if (!IsMasked) in LowerINTRINSIC_WO_CHAIN()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VFABIDemangling.cpp | 52 ParseRet tryParseMask(StringRef &MangledName, bool &IsMasked) { in tryParseMask() argument
54 IsMasked = true; in tryParseMask()
59 IsMasked = false; in tryParseMask()
338 bool IsMasked; in tryDemangleForVFABI() local
339 if (tryParseMask(MangledName, IsMasked) != ParseRet::OK) in tryDemangleForVFABI()
412 if (IsMasked) { in tryDemangleForVFABI()
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| /freebsd-13.1/sys/contrib/dev/acpica/components/events/ |
| H A D | evgpe.c | 266 BOOLEAN IsMasked) in AcpiEvMaskGpe() argument
285 if (IsMasked) in AcpiEvMaskGpe()
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| H A D | evxfgpe.c | 443 BOOLEAN IsMasked) in ACPI_EXPORT_SYMBOL()
464 Status = AcpiEvMaskGpe (GpeEventInfo, IsMasked); in ACPI_EXPORT_SYMBOL()
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| /freebsd-13.1/sys/contrib/dev/acpica/include/ |
| H A D | acevents.h | 244 BOOLEAN IsMasked);
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| H A D | acpixf.h | 1062 BOOLEAN IsMasked))
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 235 unsigned IsMasked = !(WordMask & Bit); in dump() local
241 char Ch = IsMasked ? '?' : (IsClear ? '0' : '1'); in dump()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4457 bool IsMasked = InMask.getNode() != nullptr; in tryVPTESTM() local
4477 if (IsMasked) { in tryVPTESTM()
4488 IsMasked); in tryVPTESTM()
4494 if (IsMasked) { in tryVPTESTM()
4509 if (IsMasked) in tryVPTESTM()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 15256 IsMasked = true; in getCombineLoadStoreParts()
15266 IsMasked = true; in getCombineLoadStoreParts()
15283 bool IsMasked = false; in CombineToPreIndexedLoadStore() local
15330 SDValue Val = IsMasked ? cast<MaskedStoreSDNode>(N)->getValue() in CombineToPreIndexedLoadStore()
15407 if (!IsMasked) { in CombineToPreIndexedLoadStore()
15521 bool IsMasked = false; in shouldCombineToPostInc() local
15524 IsMasked, OtherPtr, TLI)) { in shouldCombineToPostInc()
15544 bool &IsMasked, SDValue &Ptr, in getPostIndexedLoadStoreOp() argument
15550 IsMasked, Ptr, TLI) || in getPostIndexedLoadStoreOp()
15588 bool IsMasked = false; in CombineToPostIndexedLoadStore() local
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18596 bool isSEXTLoad, bool IsMasked, bool isLE, in getMVEIndexedAddressParts() argument
18607 bool CanChangeType = isLE && !IsMasked; in getMVEIndexedAddressParts()
18663 bool IsMasked = false; in getPreIndexedAddressParts() local
18678 IsMasked = true; in getPreIndexedAddressParts()
18683 IsMasked = true; in getPreIndexedAddressParts()
18692 Ptr.getNode(), VT, Alignment, isSEXTLoad, IsMasked, in getPreIndexedAddressParts()
18721 bool IsMasked = false; in getPostIndexedAddressParts() local
18739 IsMasked = true; in getPostIndexedAddressParts()
18745 IsMasked = true; in getPostIndexedAddressParts()
18771 getMVEIndexedAddressParts(Op, VT, Alignment, isSEXTLoad, IsMasked, in getPostIndexedAddressParts()
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