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Searched refs:IsLoad (Results 1 – 25 of 38) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXSwapRemoval.cpp74 unsigned int IsLoad : 1; member
342 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions()
348 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions()
359 SwapVector[VecIdx].IsLoad = 1; in gatherVectorInstructions()
669 else if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in recordUnoptimizableWebs()
680 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
697 if (SwapVector[UseIdx].IsSwap && !SwapVector[UseIdx].IsLoad && in recordUnoptimizableWebs()
727 if (!SwapVector[DefIdx].IsSwap || SwapVector[DefIdx].IsLoad || in recordUnoptimizableWebs()
778 if (SwapVector[EntryIdx].IsLoad && SwapVector[EntryIdx].IsSwap) { in markSwapsForRemoval()
1004 if (SwapVector[EntryIdx].IsLoad) in dumpSwapVector()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td793 bit IsLoad = ?;
952 let IsLoad = true;
956 let IsLoad = true;
962 let IsLoad = true;
966 let IsLoad = true;
970 let IsLoad = true;
975 let IsLoad = true;
979 let IsLoad = true;
983 let IsLoad = true;
987 let IsLoad = true;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrFormats.td35 bit IsLoad = false;
51 let TSFlags{5...5} = IsLoad;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td391 let IsLoad = 1;
396 let IsLoad = 1;
401 let IsLoad = 1;
406 let IsLoad = 1;
411 let IsLoad = 1;
416 let IsLoad = 1;
421 let IsLoad = 1;
512 let IsLoad = 1;
518 let IsLoad = 1;
H A DSIInstrInfo.td327 let IsLoad = 1;
332 let IsLoad = 1;
349 let IsLoad = 1;
354 let IsLoad = 1;
359 let IsLoad = 1;
364 let IsLoad = 1;
369 let IsLoad = 1;
374 let IsLoad = 1;
379 let IsLoad = 1;
384 let IsLoad = 1;
[all …]
H A DSIRegisterInfo.cpp255 void readWriteTmpVGPR(unsigned Offset, bool IsLoad) { in readWriteTmpVGPR()
258 TRI.buildVGPRSpillLoadStore(*this, Index, Offset, IsLoad); in readWriteTmpVGPR()
261 TRI.buildVGPRSpillLoadStore(*this, Index, Offset, IsLoad, in readWriteTmpVGPR()
265 TRI.buildVGPRSpillLoadStore(*this, Index, Offset, IsLoad); in readWriteTmpVGPR()
1290 int Offset, bool IsLoad, in buildVGPRSpillLoadStore() argument
1304 PtrInfo, IsLoad ? MachineMemOperand::MOLoad : MachineMemOperand::MOStore, in buildVGPRSpillLoadStore()
1307 if (IsLoad) { in buildVGPRSpillLoadStore()
H A DSIRegisterInfo.h112 bool IsLoad, bool IsKill = true) const;
/freebsd-13.1/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_sve.td185 def IsLoad : FlagType<0x00002000>;
266 def SVLD1 : MInst<"svld1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad], MemEltTyDefaul…
275 …def SVLD1_BF : MInst<"svld1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64_sve…
276 …def SVLD1_VNUM_BF : MInst<"svld1_vnum[_{2}]", "dPcl", "b", [IsLoad], MemEltTyDefault, "aarch64_sve…
385 …def SVLDFF1_BF : MInst<"svldff1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64…
386 …def SVLDFF1_VNUM_BF : MInst<"svldff1_vnum[_{2}]", "dPcl", "b", [IsLoad], MemEltTyDefault, "aarch64…
485 …def SVLDNF1_BF : MInst<"svldnf1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64…
486 …def SVLDNF1_VNUM_BF : MInst<"svldnf1_vnum[_{2}]", "dPcl", "b", [IsLoad], MemEltTyDefault, "aarch64…
490 def SVLDNT1 : MInst<"svldnt1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad], MemEltTyDefault, "aarch64_…
496 …def SVLDNT1_BF : MInst<"svldnt1[_{2}]", "dPc", "b", [IsLoad], MemEltTyDefault, "aarch64…
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H A DTargetBuiltins.h245 bool isLoad() const { return Flags & IsLoad; } in isLoad()
/freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/
H A DX86FoldTablesEmitter.cpp103 bool IsLoad = false; member in __anonf081826f0111::X86FoldTablesEmitter::X86FoldTableEntry
119 if (IsLoad) in print()
477 Result.IsLoad = true; in addEntryWithFlags()
/freebsd-13.1/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DCheckerManager.cpp317 bool IsLoad; member
326 : Checkers(checkers), Loc(loc), IsLoad(isLoad), NodeEx(NodeEx), in CheckLocationContext()
334 ProgramPoint::Kind K = IsLoad ? ProgramPoint::PreLoadKind : in runChecker()
341 checkFn(Loc, IsLoad, BoundEx, C); in runChecker()
/freebsd-13.1/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DCheckerDocumentation.cpp154 void checkLocation(SVal Loc, bool IsLoad, const Stmt *S, in checkLocation() argument
H A DObjCSuperDeallocChecker.cpp130 void ObjCSuperDeallocChecker::checkLocation(SVal L, bool IsLoad, const Stmt *S, in checkLocation() argument
H A DNullabilityChecker.cpp103 void checkLocation(SVal Location, bool IsLoad, const Stmt *S,
526 void NullabilityChecker::checkLocation(SVal Location, bool IsLoad, in checkLocation() argument
532 if (!IsLoad) in checkLocation()
H A DNSErrorChecker.cpp250 if (event.IsLoad) in checkEvent()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86ShuffleDecode.h136 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad,
H A DX86ShuffleDecode.cpp389 void DecodeScalarMoveMask(unsigned NumElts, bool IsLoad, in DecodeScalarMoveMask() argument
395 ShuffleMask.push_back(IsLoad ? static_cast<int>(SM_SentinelZero) : i); in DecodeScalarMoveMask()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCOptAddrMode.cpp424 bool IsLoad = Ldst->mayLoad(); in canSinkLoadStoreTo() local
426 Register ValReg = IsLoad ? Ldst->getOperand(0).getReg() : Register(); in canSinkLoadStoreTo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/
H A DLoads.cpp435 AAResults *AA, bool *IsLoad, in FindAvailableLoadedValue() argument
443 ScanBB, ScanFrom, MaxInstsToScan, AA, IsLoad, in FindAvailableLoadedValue()
/freebsd-13.1/contrib/llvm-project/clang/lib/CodeGen/
H A DCGAtomic.cpp1292 bool IsLoad = E->getOp() == AtomicExpr::AO__c11_atomic_load || in EmitAtomicExpr() local
1315 if (IsLoad) in EmitAtomicExpr()
1321 if (IsLoad || IsStore) in EmitAtomicExpr()
1349 if (!IsLoad) in EmitAtomicExpr()
1351 if (!IsLoad && !IsStore) in EmitAtomicExpr()
1378 if (!IsLoad) { in EmitAtomicExpr()
1386 if (!IsLoad && !IsStore) { in EmitAtomicExpr()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp498 bool IsLoad = in UpdateBaseRegUses() local
503 if (IsLoad || IsStore) { in UpdateBaseRegUses()
838 bool IsLoad = isi32Load(Opcode); in CreateLoadStoreDouble() local
839 assert((IsLoad || isi32Store(Opcode)) && "Must have integer load or store"); in CreateLoadStoreDouble()
840 unsigned LoadStoreOpcode = IsLoad ? ARM::t2LDRDi8 : ARM::t2STRDi8; in CreateLoadStoreDouble()
845 if (IsLoad) { in CreateLoadStoreDouble()
861 bool IsLoad = isLoadSingle(Opcode); in MergeOpsUpdate() local
876 if (IsLoad) { in MergeOpsUpdate()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVectorCombine.cpp173 : Base(B), Main{AI.Inst}, IsHvx(Hvx), IsLoad(Load) {} in MoveGroup()
178 bool IsLoad; // Is this a load group? member
659 if (Move.IsLoad) { in move()
732 Instruction *TopIn = Move.IsLoad ? Move.Main.front() : Move.Main.back(); in realignGroup()
785 if (Move.IsLoad) { in realignGroup()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DInlineSpiller.cpp753 bool IsLoad = InstrReg; in coalesceStackAccess() local
754 if (!IsLoad) in coalesceStackAccess()
761 if (!IsLoad) in coalesceStackAccess()
768 if (IsLoad) { in coalesceStackAccess()
H A DMachineScheduler.cpp1537 bool IsLoad; member in __anonde6daefc0311::BaseMemOpClusterMutation
1541 const TargetRegisterInfo *tri, bool IsLoad) in BaseMemOpClusterMutation() argument
1542 : TII(tii), TRI(tri), IsLoad(IsLoad) {} in BaseMemOpClusterMutation()
1644 if (IsLoad) { in clusterNeighboringMemOps()
1684 if ((IsLoad && !SU.getInstr()->mayLoad()) || in collectMemOpRecords()
1685 (!IsLoad && !SU.getInstr()->mayStore())) in collectMemOpRecords()
1723 (IsLoad || in groupMemOps()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp1419 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodeSignedLdStInstruction() local
1424 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) in DecodeSignedLdStInstruction()
1520 bool IsLoad = fieldFromInstruction(insn, 22, 1); in DecodePairLdStInstruction() local
1636 if (IsLoad && Rt == Rt2) in DecodePairLdStInstruction()

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